Son Luu Mai

Array ( [id] => 1546859 [patent_doc_number] => 06373753 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Memory array having selected word lines driven to an internally-generated boosted voltage that is substantially independent of VDD' [patent_app_type] => B1 [patent_app_number] => 09/503050 [patent_app_country] => US [patent_app_date] => 2000-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 50 [patent_no_of_words] => 75223 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373753.pdf [firstpage_image] =>[orig_patent_app_number] => 09503050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4344740 [patent_doc_number] => 06314026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Nonvolatile semiconductor device using local self boost technique' [patent_app_type] => 1 [patent_app_number] => 9/500315 [patent_app_country] => US [patent_app_date] => 2000-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 63 [patent_no_of_words] => 22904 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/314/06314026.pdf [firstpage_image] =>[orig_patent_app_number] => 500315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4302660 [patent_doc_number] => 06212113 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Semiconductor memory device input circuit' [patent_app_type] => 1 [patent_app_number] => 9/499552 [patent_app_country] => US [patent_app_date] => 2000-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212113.pdf [firstpage_image] =>[orig_patent_app_number] => 499552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1523355 [patent_doc_number] => 06414884 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Method and apparatus for securing electronic circuits' [patent_app_type] => B1 [patent_app_number] => 09/498006 [patent_app_country] => US [patent_app_date] => 2000-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4214 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/414/06414884.pdf [firstpage_image] =>[orig_patent_app_number] => 09498006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4272895 [patent_doc_number] => 06205069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Semiconductor memory device with fast input/output line precharge scheme and method of precharging input/output lines thereof' [patent_app_type] => 1 [patent_app_number] => 9/496948 [patent_app_country] => US [patent_app_date] => 2000-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 7023 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205069.pdf [firstpage_image] =>[orig_patent_app_number] => 496948 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4095656 [patent_doc_number] => 06163473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Memory for storing encoded mask and data bits' [patent_app_type] => 1 [patent_app_number] => 9/496854 [patent_app_country] => US [patent_app_date] => 2000-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8517 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163473.pdf [firstpage_image] =>[orig_patent_app_number] => 496854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1504331 [patent_doc_number] => 06487117 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Method for programming NAND-type flash memory device using bulk bias' [patent_app_type] => B1 [patent_app_number] => 09/494850 [patent_app_country] => US [patent_app_date] => 2000-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4036 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487117.pdf [firstpage_image] =>[orig_patent_app_number] => 09494850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4417367 [patent_doc_number] => 06172905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Method of operating a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/495354 [patent_app_country] => US [patent_app_date] => 2000-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 4369 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 408 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172905.pdf [firstpage_image] =>[orig_patent_app_number] => 495354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4302506 [patent_doc_number] => 06212104 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Flash memory using micro vacuum tube technology' [patent_app_type] => 1 [patent_app_number] => 9/495346 [patent_app_country] => US [patent_app_date] => 2000-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4549 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212104.pdf [firstpage_image] =>[orig_patent_app_number] => 495346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4425533 [patent_doc_number] => 06195278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Content addressable memory cells and words' [patent_app_type] => 1 [patent_app_number] => 9/475046 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9052 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195278.pdf [firstpage_image] =>[orig_patent_app_number] => 475046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4317917 [patent_doc_number] => 06252791 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems' [patent_app_type] => 1 [patent_app_number] => 9/473848 [patent_app_country] => US [patent_app_date] => 1999-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 6545 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252791.pdf [firstpage_image] =>[orig_patent_app_number] => 473848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4309432 [patent_doc_number] => 06198684 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Word line decoder for dual-port cache memory' [patent_app_type] => 1 [patent_app_number] => 9/471654 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2208 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/198/06198684.pdf [firstpage_image] =>[orig_patent_app_number] => 471654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4425544 [patent_doc_number] => 06178115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Semiconductor memory device and storage method thereof' [patent_app_type] => 1 [patent_app_number] => 9/470652 [patent_app_country] => US [patent_app_date] => 1999-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 59 [patent_no_of_words] => 26215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178115.pdf [firstpage_image] =>[orig_patent_app_number] => 470652 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4416733 [patent_doc_number] => 06233170 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Sense amplifier circuit, memory device using the circuit and method for reading the memory device' [patent_app_type] => 1 [patent_app_number] => 9/464448 [patent_app_country] => US [patent_app_date] => 1999-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 6757 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233170.pdf [firstpage_image] =>[orig_patent_app_number] => 464448 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4261984 [patent_doc_number] => 06137744 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Memory device with reduced power consumption' [patent_app_type] => 1 [patent_app_number] => 9/459650 [patent_app_country] => US [patent_app_date] => 1999-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3311 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/137/06137744.pdf [firstpage_image] =>[orig_patent_app_number] => 459650 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4425525 [patent_doc_number] => 06178111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method and apparatus for writing data states to non-volatile storage devices' [patent_app_type] => 1 [patent_app_number] => 9/455850 [patent_app_country] => US [patent_app_date] => 1999-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5880 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178111.pdf [firstpage_image] =>[orig_patent_app_number] => 455850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4302646 [patent_doc_number] => 06212112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Method to verify the integrity of the decoding circuits of a memory' [patent_app_type] => 1 [patent_app_number] => 9/452446 [patent_app_country] => US [patent_app_date] => 1999-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3454 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212112.pdf [firstpage_image] =>[orig_patent_app_number] => 452446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4197242 [patent_doc_number] => 06160752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/453086 [patent_app_country] => US [patent_app_date] => 1999-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12353 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160752.pdf [firstpage_image] =>[orig_patent_app_number] => 453086 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4250324 [patent_doc_number] => 06144579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => 1 [patent_app_number] => 9/447292 [patent_app_country] => US [patent_app_date] => 1999-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5749 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144579.pdf [firstpage_image] =>[orig_patent_app_number] => 447292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4250269 [patent_doc_number] => 06144575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Die architecture accommodating high-speed semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/439972 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3238 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144575.pdf [firstpage_image] =>[orig_patent_app_number] => 439972 [rel_patent_id] =>[rel_patent_doc_number] =>)