Search

Son Luu Mai

Examiner (ID: 16593, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17373385 [patent_doc_number] => 20220028437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => ARITHMETIC OPERATIONS IN MEMORY [patent_app_type] => utility [patent_app_number] => 16/934482 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934482 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934482
Arithmetic operations in memory Jul 20, 2020 Issued
Array ( [id] => 17010653 [patent_doc_number] => 20210241814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => DATA RECEIVING DEVICE, A SEMICONDUCTOR APPARATUS, AND A SEMICONDUCTOR SYSTEM USING THE DATA RECEIVING DEVICE [patent_app_type] => utility [patent_app_number] => 16/928866 [patent_app_country] => US [patent_app_date] => 2020-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16928866 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/928866
Data receiving device, a semiconductor apparatus, and a semiconductor system using the data receiving device Jul 13, 2020 Issued
Array ( [id] => 17040383 [patent_doc_number] => 20210257019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/928192 [patent_app_country] => US [patent_app_date] => 2020-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16928192 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/928192
Semiconductor memory device and operating method thereof Jul 13, 2020 Issued
Array ( [id] => 17239367 [patent_doc_number] => 11183255 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-23 [patent_title] => Methods and devices for erasing non-volatile memory [patent_app_type] => utility [patent_app_number] => 16/925059 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9994 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16925059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/925059
Methods and devices for erasing non-volatile memory Jul 8, 2020 Issued
Array ( [id] => 16440141 [patent_doc_number] => 20200357468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => 3D MEMORY DEVICE INCLUDING SHARED SELECT GATE CONNECTIONS BETWEEN MEMORY BLOCKS [patent_app_type] => utility [patent_app_number] => 16/921613 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921613 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921613
3D memory device including shared select gate connections between memory blocks Jul 5, 2020 Issued
Array ( [id] => 16528517 [patent_doc_number] => 20200402598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => OPERATING METHOD OF CONTROLLER [patent_app_type] => utility [patent_app_number] => 16/918099 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16918099 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/918099
Operating method of controller Jun 30, 2020 Issued
Array ( [id] => 16928091 [patent_doc_number] => 11049580 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-29 [patent_title] => Modulation of programming voltage during cycling [patent_app_type] => utility [patent_app_number] => 16/914408 [patent_app_country] => US [patent_app_date] => 2020-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 15674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914408 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914408
Modulation of programming voltage during cycling Jun 27, 2020 Issued
Array ( [id] => 16544651 [patent_doc_number] => 20200411066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => BINARY WEIGHTED VOLTAGE ENCODING SCHEME FOR SUPPORTING MULTI-BIT INPUT PRECISION [patent_app_type] => utility [patent_app_number] => 16/899722 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899722 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/899722
Binary weighted voltage encoding scheme for supporting multi-bit input precision Jun 11, 2020 Issued
Array ( [id] => 16332025 [patent_doc_number] => 20200302991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION [patent_app_type] => utility [patent_app_number] => 16/897157 [patent_app_country] => US [patent_app_date] => 2020-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16897157 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/897157
Memory controller with clock-to-strobe skew compensation Jun 8, 2020 Issued
Array ( [id] => 17092679 [patent_doc_number] => 11120873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Devices and methods to program a memory cell [patent_app_type] => utility [patent_app_number] => 16/894260 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6010 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16894260 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/894260
Devices and methods to program a memory cell Jun 4, 2020 Issued
Array ( [id] => 17195876 [patent_doc_number] => 11164641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Refreshing data stored at a memory component based on a memory component characteristic component [patent_app_type] => utility [patent_app_number] => 16/889736 [patent_app_country] => US [patent_app_date] => 2020-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 9703 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16889736 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/889736
Refreshing data stored at a memory component based on a memory component characteristic component May 31, 2020 Issued
Array ( [id] => 16315849 [patent_doc_number] => 20200294587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => PERFORMING A TEST OF MEMORY COMPONENTS WITH FAULT TOLERANCE [patent_app_type] => utility [patent_app_number] => 16/889774 [patent_app_country] => US [patent_app_date] => 2020-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16889774 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/889774
Performing a test of memory components with fault tolerance May 31, 2020 Issued
Array ( [id] => 16789007 [patent_doc_number] => 10991444 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-27 [patent_title] => Tiered read reference calibration [patent_app_type] => utility [patent_app_number] => 16/885775 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 22708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885775 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885775
Tiered read reference calibration May 27, 2020 Issued
Array ( [id] => 17246823 [patent_doc_number] => 20210366568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => MEMORY DEVICE WITH POST PACKAGE REPAIR FUNCTION AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/879944 [patent_app_country] => US [patent_app_date] => 2020-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16879944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/879944
Memory device with post package repair function and method for operating the same May 20, 2020 Issued
Array ( [id] => 17424066 [patent_doc_number] => 11257527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Memory module with battery and electronic system having the memory module [patent_app_type] => utility [patent_app_number] => 16/877073 [patent_app_country] => US [patent_app_date] => 2020-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13453 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877073 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/877073
Memory module with battery and electronic system having the memory module May 17, 2020 Issued
Array ( [id] => 17424088 [patent_doc_number] => 11257549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Sequential voltage control for a memory device [patent_app_type] => utility [patent_app_number] => 16/870670 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 16492 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870670
Sequential voltage control for a memory device May 7, 2020 Issued
Array ( [id] => 17002372 [patent_doc_number] => 11081194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Suppression of program disturb with bit line and select gate voltage regulation [patent_app_type] => utility [patent_app_number] => 16/867828 [patent_app_country] => US [patent_app_date] => 2020-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8953 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867828 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/867828
Suppression of program disturb with bit line and select gate voltage regulation May 5, 2020 Issued
Array ( [id] => 16958907 [patent_doc_number] => 11062784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Non-volatile memory devices, operating methods thereof and memory systems including the same [patent_app_type] => utility [patent_app_number] => 16/844317 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 32 [patent_no_of_words] => 15774 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844317 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844317
Non-volatile memory devices, operating methods thereof and memory systems including the same Apr 8, 2020 Issued
Array ( [id] => 16402584 [patent_doc_number] => 20200343442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => MAGNETORESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/843708 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15551 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16843708 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/843708
Magnetoresistance effect element and magnetic memory Apr 7, 2020 Issued
Array ( [id] => 16987768 [patent_doc_number] => 11074947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Semiconductor memory apparatus and data processing system [patent_app_type] => utility [patent_app_number] => 16/837564 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7935 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837564 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837564
Semiconductor memory apparatus and data processing system Mar 31, 2020 Issued
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