
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3986439
[patent_doc_number] => 05905675
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[patent_kind] => NA
[patent_issue_date] => 1999-05-18
[patent_title] => 'Biasing scheme for reducing stress and improving reliability in EEPROM cells'
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[patent_app_number] => 8/995870
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[patent_app_date] => 1997-12-22
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Array
(
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[patent_doc_number] => 05966323
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[patent_kind] => NA
[patent_issue_date] => 1999-10-12
[patent_title] => 'Low switching field magnetoresistive tunneling junction for high density arrays'
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[patent_app_number] => 8/993768
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[patent_app_date] => 1997-12-18
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Array
(
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[patent_issue_date] => 1999-01-12
[patent_title] => 'Programming of memory cells using connected floating gate analog reference cell'
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[patent_app_number] => 8/991466
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[patent_app_date] => 1997-12-16
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Array
(
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[patent_country] => US
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[patent_issue_date] => 1999-07-20
[patent_title] => 'Semiconductor integrated circuit device and method of activating the same'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/985425 | Semiconductor integrated circuit device and method of activating the same | Dec 4, 1997 | Issued |
Array
(
[id] => 3802245
[patent_doc_number] => 05841691
[patent_country] => US
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[patent_issue_date] => 1998-11-24
[patent_title] => 'Adjustable cell plate generator'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/979403 | Adjustable cell plate generator | Nov 25, 1997 | Issued |
Array
(
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[patent_doc_number] => 05886949
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[patent_issue_date] => 1999-03-23
[patent_title] => 'Method and circuit for generating a synchronizing ATD signal'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/978665 | Method and circuit for generating a synchronizing ATD signal | Nov 25, 1997 | Issued |
Array
(
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[patent_issue_date] => 1999-05-11
[patent_title] => 'Op amp circuit with variable resistance and memory system including same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/978734 | Op amp circuit with variable resistance and memory system including same | Nov 25, 1997 | Issued |
Array
(
[id] => 4027200
[patent_doc_number] => 05907509
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[patent_kind] => NA
[patent_issue_date] => 1999-05-25
[patent_title] => 'Semiconductor memory device that can read out data at high speed'
[patent_app_type] => 1
[patent_app_number] => 8/978421
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/978421 | Semiconductor memory device that can read out data at high speed | Nov 24, 1997 | Issued |
Array
(
[id] => 4209485
[patent_doc_number] => 06014340
[patent_country] => US
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[patent_issue_date] => 2000-01-11
[patent_title] => 'Synchronous semiconductor memory device having internal circuitry enabled only when commands are applied in normal sequence'
[patent_app_type] => 1
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Array
(
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[patent_doc_number] => 05812460
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[patent_issue_date] => 1998-09-22
[patent_title] => 'Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof'
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[patent_app_number] => 8/974670
[patent_app_country] => US
[patent_app_date] => 1997-11-19
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Array
(
[id] => 4265768
[patent_doc_number] => 06208545
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[patent_issue_date] => 2001-03-27
[patent_title] => 'Three dimensional structure memory'
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Array
(
[id] => 3969931
[patent_doc_number] => 05936880
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[patent_title] => 'Bi-layer programmable resistor memory'
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Array
(
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[patent_title] => 'Noise restraining semiconductor memory device'
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Array
(
[id] => 3905179
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Array
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Array
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Array
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Array
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