
Son Luu Mai
Examiner (ID: 16593, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17115315
[patent_doc_number] => 20210295912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => BIT LINE AND WORD LINE CONNECTION FOR MEMORY ARRAY
[patent_app_type] => utility
[patent_app_number] => 16/821208
[patent_app_country] => US
[patent_app_date] => 2020-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11217
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821208
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/821208 | Bit line and word line connection for memory array | Mar 16, 2020 | Issued |
Array
(
[id] => 16973423
[patent_doc_number] => 11069402
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-07-20
[patent_title] => Integrated pixel and three-terminal non-volatile memory cell and an array of cells for deep in-sensor, in-memory computing
[patent_app_type] => utility
[patent_app_number] => 16/820801
[patent_app_country] => US
[patent_app_date] => 2020-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 10531
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820801
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/820801 | Integrated pixel and three-terminal non-volatile memory cell and an array of cells for deep in-sensor, in-memory computing | Mar 16, 2020 | Issued |
Array
(
[id] => 17152259
[patent_doc_number] => 11145346
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-12
[patent_title] => Memory device
[patent_app_type] => utility
[patent_app_number] => 16/816020
[patent_app_country] => US
[patent_app_date] => 2020-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 15348
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816020
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/816020 | Memory device | Mar 10, 2020 | Issued |
Array
(
[id] => 17107247
[patent_doc_number] => 11127472
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-09-21
[patent_title] => Memory device for changing pass voltage
[patent_app_type] => utility
[patent_app_number] => 16/806535
[patent_app_country] => US
[patent_app_date] => 2020-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 8268
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806535
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/806535 | Memory device for changing pass voltage | Mar 1, 2020 | Issued |
Array
(
[id] => 17032573
[patent_doc_number] => 11094390
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-17
[patent_title] => Semiconductor memory devices and methods of operating semiconductor memory devices
[patent_app_type] => utility
[patent_app_number] => 16/795730
[patent_app_country] => US
[patent_app_date] => 2020-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 21
[patent_no_of_words] => 10025
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 295
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795730
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/795730 | Semiconductor memory devices and methods of operating semiconductor memory devices | Feb 19, 2020 | Issued |
Array
(
[id] => 16819688
[patent_doc_number] => 11004525
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-05-11
[patent_title] => Modulation of programming voltage during cycling
[patent_app_type] => utility
[patent_app_number] => 16/796897
[patent_app_country] => US
[patent_app_date] => 2020-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 24
[patent_no_of_words] => 15638
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16796897
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/796897 | Modulation of programming voltage during cycling | Feb 19, 2020 | Issued |
Array
(
[id] => 16716508
[patent_doc_number] => 20210083655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-18
[patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT, TRANSMISSION DEVICE, AND MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/795677
[patent_app_country] => US
[patent_app_date] => 2020-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12603
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795677
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/795677 | Semiconductor integrated circuit, transmission device, and memory device | Feb 19, 2020 | Issued |
Array
(
[id] => 16973447
[patent_doc_number] => 11069426
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-07-20
[patent_title] => Memory device with a row repair mechanism and methods for operating the same
[patent_app_type] => utility
[patent_app_number] => 16/796511
[patent_app_country] => US
[patent_app_date] => 2020-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 7179
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16796511
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/796511 | Memory device with a row repair mechanism and methods for operating the same | Feb 19, 2020 | Issued |
Array
(
[id] => 16928089
[patent_doc_number] => 11049578
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-06-29
[patent_title] => Non-volatile memory with program verify skip
[patent_app_type] => utility
[patent_app_number] => 16/795313
[patent_app_country] => US
[patent_app_date] => 2020-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 25
[patent_no_of_words] => 15579
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795313
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/795313 | Non-volatile memory with program verify skip | Feb 18, 2020 | Issued |
Array
(
[id] => 17683234
[patent_doc_number] => 11367495
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-21
[patent_title] => Microelectronic device testing, and associated methods, devices, and systems
[patent_app_type] => utility
[patent_app_number] => 16/782949
[patent_app_country] => US
[patent_app_date] => 2020-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 8018
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16782949
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/782949 | Microelectronic device testing, and associated methods, devices, and systems | Feb 4, 2020 | Issued |
Array
(
[id] => 16578440
[patent_doc_number] => 20210012841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-14
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/774630
[patent_app_country] => US
[patent_app_date] => 2020-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21353
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774630
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/774630 | Semiconductor memory device | Jan 27, 2020 | Issued |
Array
(
[id] => 16803944
[patent_doc_number] => 10998906
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-05-04
[patent_title] => Logic device using spin torque
[patent_app_type] => utility
[patent_app_number] => 16/774322
[patent_app_country] => US
[patent_app_date] => 2020-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 8099
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774322
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/774322 | Logic device using spin torque | Jan 27, 2020 | Issued |
Array
(
[id] => 16653136
[patent_doc_number] => 10930327
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-02-23
[patent_title] => Memory read masking
[patent_app_type] => utility
[patent_app_number] => 16/773824
[patent_app_country] => US
[patent_app_date] => 2020-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 12419
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16773824
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/773824 | Memory read masking | Jan 26, 2020 | Issued |
Array
(
[id] => 16592390
[patent_doc_number] => 10901651
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-26
[patent_title] => Memory block erasure
[patent_app_type] => utility
[patent_app_number] => 16/733363
[patent_app_country] => US
[patent_app_date] => 2020-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6335
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733363
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/733363 | Memory block erasure | Jan 2, 2020 | Issued |
Array
(
[id] => 16699679
[patent_doc_number] => 10950286
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-16
[patent_title] => Periphery fill and localized capacitance
[patent_app_type] => utility
[patent_app_number] => 16/733160
[patent_app_country] => US
[patent_app_date] => 2020-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 13552
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733160
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/733160 | Periphery fill and localized capacitance | Jan 1, 2020 | Issued |
Array
(
[id] => 16707436
[patent_doc_number] => 10957378
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-03-23
[patent_title] => Control circuit and control method thereof for pseudo static random access memory
[patent_app_type] => utility
[patent_app_number] => 16/724414
[patent_app_country] => US
[patent_app_date] => 2019-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 19
[patent_no_of_words] => 8778
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724414
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/724414 | Control circuit and control method thereof for pseudo static random access memory | Dec 22, 2019 | Issued |
Array
(
[id] => 16521415
[patent_doc_number] => 10872638
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-22
[patent_title] => Data storage system and method based on data temperature
[patent_app_type] => utility
[patent_app_number] => 16/724081
[patent_app_country] => US
[patent_app_date] => 2019-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 6313
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724081
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/724081 | Data storage system and method based on data temperature | Dec 19, 2019 | Issued |
Array
(
[id] => 16845784
[patent_doc_number] => 11017879
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-05-25
[patent_title] => Adjustable column address scramble using fuses
[patent_app_type] => utility
[patent_app_number] => 16/723532
[patent_app_country] => US
[patent_app_date] => 2019-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 12518
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723532
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/723532 | Adjustable column address scramble using fuses | Dec 19, 2019 | Issued |
Array
(
[id] => 16440131
[patent_doc_number] => 20200357458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY APPARATUS INCLUDING THE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/723800
[patent_app_country] => US
[patent_app_date] => 2019-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6468
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723800
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/723800 | Semiconductor device and semiconductor memory apparatus including the semiconductor device | Dec 19, 2019 | Issued |
Array
(
[id] => 16479341
[patent_doc_number] => 10854294
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-12-01
[patent_title] => Semiconductor memory device having pass transistors
[patent_app_type] => utility
[patent_app_number] => 16/723268
[patent_app_country] => US
[patent_app_date] => 2019-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 8231
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723268
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/723268 | Semiconductor memory device having pass transistors | Dec 19, 2019 | Issued |