Search

Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3988810 [patent_doc_number] => 05917769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Method and system rotating data in a memory array device' [patent_app_type] => 1 [patent_app_number] => 8/909866 [patent_app_country] => US [patent_app_date] => 1997-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1941 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917769.pdf [firstpage_image] =>[orig_patent_app_number] => 909866 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/909866
Method and system rotating data in a memory array device Aug 11, 1997 Issued
Array ( [id] => 4082554 [patent_doc_number] => 06069832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Method for multiple staged power up of integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/908234 [patent_app_country] => US [patent_app_date] => 1997-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4730 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069832.pdf [firstpage_image] =>[orig_patent_app_number] => 908234 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/908234
Method for multiple staged power up of integrated circuit Aug 6, 1997 Issued
Array ( [id] => 3883081 [patent_doc_number] => 05838629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Semiconductor memory device having level-shifted precharge signal' [patent_app_type] => 1 [patent_app_number] => 8/907030 [patent_app_country] => US [patent_app_date] => 1997-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12354 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 617 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838629.pdf [firstpage_image] =>[orig_patent_app_number] => 907030 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/907030
Semiconductor memory device having level-shifted precharge signal Aug 5, 1997 Issued
Array ( [id] => 3932557 [patent_doc_number] => 05914898 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Memory device and system with leakage blocking circuitry' [patent_app_type] => 1 [patent_app_number] => 8/906568 [patent_app_country] => US [patent_app_date] => 1997-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5198 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914898.pdf [firstpage_image] =>[orig_patent_app_number] => 906568 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/906568
Memory device and system with leakage blocking circuitry Aug 4, 1997 Issued
Array ( [id] => 3770393 [patent_doc_number] => 05852572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Small-sized static random access memory cell' [patent_app_type] => 1 [patent_app_number] => 8/906270 [patent_app_country] => US [patent_app_date] => 1997-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3077 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852572.pdf [firstpage_image] =>[orig_patent_app_number] => 906270 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/906270
Small-sized static random access memory cell Aug 4, 1997 Issued
Array ( [id] => 3873446 [patent_doc_number] => 05796669 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Synchronous semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/900123 [patent_app_country] => US [patent_app_date] => 1997-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 48 [patent_no_of_words] => 9528 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796669.pdf [firstpage_image] =>[orig_patent_app_number] => 900123 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/900123
Synchronous semiconductor memory device Jul 24, 1997 Issued
Array ( [id] => 3998583 [patent_doc_number] => 05959921 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Sense amplifier for complement or no-complementary data signals' [patent_app_type] => 1 [patent_app_number] => 8/899524 [patent_app_country] => US [patent_app_date] => 1997-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5195 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959921.pdf [firstpage_image] =>[orig_patent_app_number] => 899524 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/899524
Sense amplifier for complement or no-complementary data signals Jul 23, 1997 Issued
Array ( [id] => 4093586 [patent_doc_number] => 06055198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Device to check the end of a test' [patent_app_type] => 1 [patent_app_number] => 8/897869 [patent_app_country] => US [patent_app_date] => 1997-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7368 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055198.pdf [firstpage_image] =>[orig_patent_app_number] => 897869 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/897869
Device to check the end of a test Jul 20, 1997 Issued
Array ( [id] => 4067296 [patent_doc_number] => 05864505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Random access memory with plural simultaneously operable banks' [patent_app_type] => 1 [patent_app_number] => 8/893568 [patent_app_country] => US [patent_app_date] => 1997-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 2578 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864505.pdf [firstpage_image] =>[orig_patent_app_number] => 893568 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/893568
Random access memory with plural simultaneously operable banks Jul 10, 1997 Issued
Array ( [id] => 3873323 [patent_doc_number] => 05796661 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Output buffer circuit of semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/890025 [patent_app_country] => US [patent_app_date] => 1997-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 19 [patent_no_of_words] => 3764 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796661.pdf [firstpage_image] =>[orig_patent_app_number] => 890025 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/890025
Output buffer circuit of semiconductor memory device Jul 9, 1997 Issued
Array ( [id] => 4004974 [patent_doc_number] => 05892714 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Method of programming and/or verifying a threshold voltage level of a nonvolatile memory cell' [patent_app_type] => 1 [patent_app_number] => 8/890564 [patent_app_country] => US [patent_app_date] => 1997-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 7366 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892714.pdf [firstpage_image] =>[orig_patent_app_number] => 890564 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/890564
Method of programming and/or verifying a threshold voltage level of a nonvolatile memory cell Jul 8, 1997 Issued
Array ( [id] => 4027318 [patent_doc_number] => 05907516 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Semiconductor memory device with reduced data bus line load' [patent_app_type] => 1 [patent_app_number] => 8/889332 [patent_app_country] => US [patent_app_date] => 1997-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3260 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907516.pdf [firstpage_image] =>[orig_patent_app_number] => 889332 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/889332
Semiconductor memory device with reduced data bus line load Jul 7, 1997 Issued
Array ( [id] => 3905383 [patent_doc_number] => 05835439 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Sub word line driving circuit and a semiconductor memory device using the same' [patent_app_type] => 1 [patent_app_number] => 8/887280 [patent_app_country] => US [patent_app_date] => 1997-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2850 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835439.pdf [firstpage_image] =>[orig_patent_app_number] => 887280 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/887280
Sub word line driving circuit and a semiconductor memory device using the same Jul 1, 1997 Issued
Array ( [id] => 3891617 [patent_doc_number] => 05798960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Current memory for sampling analog currents' [patent_app_type] => 1 [patent_app_number] => 8/884975 [patent_app_country] => US [patent_app_date] => 1997-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798960.pdf [firstpage_image] =>[orig_patent_app_number] => 884975 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/884975
Current memory for sampling analog currents Jun 29, 1997 Issued
Array ( [id] => 3824813 [patent_doc_number] => 05812452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Electrically byte-selectable and byte-alterable memory arrays' [patent_app_type] => 1 [patent_app_number] => 8/884825 [patent_app_country] => US [patent_app_date] => 1997-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 6945 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812452.pdf [firstpage_image] =>[orig_patent_app_number] => 884825 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/884825
Electrically byte-selectable and byte-alterable memory arrays Jun 29, 1997 Issued
Array ( [id] => 3853621 [patent_doc_number] => 05848003 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 8/884265 [patent_app_country] => US [patent_app_date] => 1997-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 7931 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/848/05848003.pdf [firstpage_image] =>[orig_patent_app_number] => 884265 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/884265
Semiconductor memory Jun 26, 1997 Issued
Array ( [id] => 3826239 [patent_doc_number] => 05771201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'Synchronous semiconductor device having an apparatus for producing strobe clock signals' [patent_app_type] => 1 [patent_app_number] => 8/882864 [patent_app_country] => US [patent_app_date] => 1997-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2667 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/771/05771201.pdf [firstpage_image] =>[orig_patent_app_number] => 882864 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/882864
Synchronous semiconductor device having an apparatus for producing strobe clock signals Jun 25, 1997 Issued
Array ( [id] => 3853444 [patent_doc_number] => 05847992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Multi-level non-volatile semiconductor memory device having improved multi-level data storing circuits' [patent_app_type] => 1 [patent_app_number] => 8/883370 [patent_app_country] => US [patent_app_date] => 1997-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 25257 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/847/05847992.pdf [firstpage_image] =>[orig_patent_app_number] => 883370 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/883370
Multi-level non-volatile semiconductor memory device having improved multi-level data storing circuits Jun 25, 1997 Issued
Array ( [id] => 3939714 [patent_doc_number] => 05877979 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Single-sided RAM cell and method of accessing same' [patent_app_type] => 1 [patent_app_number] => 8/884369 [patent_app_country] => US [patent_app_date] => 1997-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4235 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877979.pdf [firstpage_image] =>[orig_patent_app_number] => 884369 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/884369
Single-sided RAM cell and method of accessing same Jun 25, 1997 Issued
Array ( [id] => 3853468 [patent_doc_number] => 05847993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Non-volatile programmable CMOS logic cell and method of operating same' [patent_app_type] => 1 [patent_app_number] => 8/881719 [patent_app_country] => US [patent_app_date] => 1997-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/847/05847993.pdf [firstpage_image] =>[orig_patent_app_number] => 881719 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/881719
Non-volatile programmable CMOS logic cell and method of operating same Jun 22, 1997 Issued
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