
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3770500
[patent_doc_number] => 05852579
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-22
[patent_title] => 'Method and circuit for preventing and/or inhibiting contention in a system employing a random access memory'
[patent_app_type] => 1
[patent_app_number] => 8/878904
[patent_app_country] => US
[patent_app_date] => 1997-06-19
[patent_effective_date] => 0000-00-00
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[patent_figures_cnt] => 9
[patent_no_of_words] => 4498
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[patent_words_short_claim] => 65
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/852/05852579.pdf
[firstpage_image] =>[orig_patent_app_number] => 878904
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/878904 | Method and circuit for preventing and/or inhibiting contention in a system employing a random access memory | Jun 18, 1997 | Issued |
Array
(
[id] => 3915342
[patent_doc_number] => 05898626
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Redundancy programming circuit and system for semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/879208
[patent_app_country] => US
[patent_app_date] => 1997-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/898/05898626.pdf
[firstpage_image] =>[orig_patent_app_number] => 879208
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/879208 | Redundancy programming circuit and system for semiconductor memory | Jun 18, 1997 | Issued |
Array
(
[id] => 4064171
[patent_doc_number] => 05933365
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-03
[patent_title] => 'Memory element with energy control mechanism'
[patent_app_type] => 1
[patent_app_number] => 8/878870
[patent_app_country] => US
[patent_app_date] => 1997-06-19
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[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/933/05933365.pdf
[firstpage_image] =>[orig_patent_app_number] => 878870
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/878870 | Memory element with energy control mechanism | Jun 18, 1997 | Issued |
Array
(
[id] => 3980551
[patent_doc_number] => 05886925
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-23
[patent_title] => 'Read circuit and method for nonvolatile memory cells with an equalizing structure'
[patent_app_type] => 1
[patent_app_number] => 8/877922
[patent_app_country] => US
[patent_app_date] => 1997-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 5711
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[pdf_file] => patents/05/886/05886925.pdf
[firstpage_image] =>[orig_patent_app_number] => 877922
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/877922 | Read circuit and method for nonvolatile memory cells with an equalizing structure | Jun 17, 1997 | Issued |
Array
(
[id] => 3892078
[patent_doc_number] => 05805500
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-08
[patent_title] => 'Circuit and method for generating a read reference signal for nonvolatile memory cells'
[patent_app_type] => 1
[patent_app_number] => 8/877921
[patent_app_country] => US
[patent_app_date] => 1997-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 5585
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[pdf_file] => patents/05/805/05805500.pdf
[firstpage_image] =>[orig_patent_app_number] => 877921
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/877921 | Circuit and method for generating a read reference signal for nonvolatile memory cells | Jun 17, 1997 | Issued |
Array
(
[id] => 3937136
[patent_doc_number] => 05946238
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Single-cell reference signal generating circuit for reading nonvolatile memory'
[patent_app_type] => 1
[patent_app_number] => 8/877066
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[patent_app_date] => 1997-06-17
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[pdf_file] => patents/05/946/05946238.pdf
[firstpage_image] =>[orig_patent_app_number] => 877066
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/877066 | Single-cell reference signal generating circuit for reading nonvolatile memory | Jun 16, 1997 | Issued |
Array
(
[id] => 4054735
[patent_doc_number] => 05875142
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'Integrated circuit with temperature detector'
[patent_app_type] => 1
[patent_app_number] => 8/877229
[patent_app_country] => US
[patent_app_date] => 1997-06-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/875/05875142.pdf
[firstpage_image] =>[orig_patent_app_number] => 877229
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/877229 | Integrated circuit with temperature detector | Jun 16, 1997 | Issued |
Array
(
[id] => 4015067
[patent_doc_number] => 05859794
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Multilevel memory cell sense amplifier system and sensing methods'
[patent_app_type] => 1
[patent_app_number] => 8/874794
[patent_app_country] => US
[patent_app_date] => 1997-06-13
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/859/05859794.pdf
[firstpage_image] =>[orig_patent_app_number] => 874794
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/874794 | Multilevel memory cell sense amplifier system and sensing methods | Jun 12, 1997 | Issued |
Array
(
[id] => 4015040
[patent_doc_number] => 05859792
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Circuit for on-board programming of PRD serial EEPROMs'
[patent_app_type] => 1
[patent_app_number] => 8/873968
[patent_app_country] => US
[patent_app_date] => 1997-06-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/859/05859792.pdf
[firstpage_image] =>[orig_patent_app_number] => 873968
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873968 | Circuit for on-board programming of PRD serial EEPROMs | Jun 11, 1997 | Issued |
Array
(
[id] => 3853785
[patent_doc_number] => 05848014
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-08
[patent_title] => 'Semiconductor device such as a static random access memory (SRAM) having a low power mode using a clock disable circuit'
[patent_app_type] => 1
[patent_app_number] => 8/874006
[patent_app_country] => US
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[pdf_file] => patents/05/848/05848014.pdf
[firstpage_image] =>[orig_patent_app_number] => 874006
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Array
(
[id] => 4025608
[patent_doc_number] => 05963463
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-05
[patent_title] => 'Method for on-board programming of PRD serial EEPROMS'
[patent_app_type] => 1
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[patent_app_date] => 1997-06-12
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[pdf_file] => patents/05/963/05963463.pdf
[firstpage_image] =>[orig_patent_app_number] => 873971
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873971 | Method for on-board programming of PRD serial EEPROMS | Jun 11, 1997 | Issued |
Array
(
[id] => 4077899
[patent_doc_number] => 05867448
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-02
[patent_title] => 'Buffer for memory modules with trace delay compensation'
[patent_app_type] => 1
[patent_app_number] => 8/873005
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 873005
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873005 | Buffer for memory modules with trace delay compensation | Jun 10, 1997 | Issued |
Array
(
[id] => 3844741
[patent_doc_number] => 05761142
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-02
[patent_title] => 'Semiconductor memory device having sense amplifier drivers disposed on center portion of cell array block'
[patent_app_type] => 1
[patent_app_number] => 8/871132
[patent_app_country] => US
[patent_app_date] => 1997-06-06
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[firstpage_image] =>[orig_patent_app_number] => 871132
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/871132 | Semiconductor memory device having sense amplifier drivers disposed on center portion of cell array block | Jun 5, 1997 | Issued |
Array
(
[id] => 4034603
[patent_doc_number] => 05926427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-20
[patent_title] => 'Power line noise prevention circuit for semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/869005
[patent_app_country] => US
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[pdf_file] => patents/05/926/05926427.pdf
[firstpage_image] =>[orig_patent_app_number] => 869005
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/869005 | Power line noise prevention circuit for semiconductor memory device | Jun 3, 1997 | Issued |
Array
(
[id] => 3837759
[patent_doc_number] => 05784326
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Voltage raising device'
[patent_app_type] => 1
[patent_app_number] => 8/868731
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[firstpage_image] =>[orig_patent_app_number] => 868731
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/868731 | Voltage raising device | Jun 3, 1997 | Issued |
Array
(
[id] => 4067265
[patent_doc_number] => 05864503
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[patent_issue_date] => 1999-01-26
[patent_title] => 'Method for verifying electrically programmable non-volatile memory cells of an electrically programmable non-volatile memory device after programming'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/866531 | Method for verifying electrically programmable non-volatile memory cells of an electrically programmable non-volatile memory device after programming | May 29, 1997 | Issued |
Array
(
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[patent_doc_number] => 05841695
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[patent_title] => 'Memory system using multiple storage mechanisms to enable storage and retrieval of more than two states in a memory cell'
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Array
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Array
(
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Array
(
[id] => 3904764
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[patent_issue_date] => 1998-11-10
[patent_title] => 'Imprint compensation circuit for use in ferroelectric semiconductor memory device'
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[pdf_file] => patents/05/835/05835399.pdf
[firstpage_image] =>[orig_patent_app_number] => 857469
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/857469 | Imprint compensation circuit for use in ferroelectric semiconductor memory device | May 14, 1997 | Issued |