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Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3852042 [patent_doc_number] => 05708614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Data output control circuit of semiconductor memory device having pipeline structure' [patent_app_type] => 1 [patent_app_number] => 8/784783 [patent_app_country] => US [patent_app_date] => 1997-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708614.pdf [firstpage_image] =>[orig_patent_app_number] => 784783 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/784783
Data output control circuit of semiconductor memory device having pipeline structure Jan 15, 1997 Issued
08/782587 METHOD FOR PROGRAMMING A SINGLE EPROM OR FLASH MEMORY CELL TO STORE MULTIPLE BITS OF DATA THAT UTILIZES A PUNCHTHROUGH CURRENT Jan 12, 1997 Abandoned
Array ( [id] => 3809420 [patent_doc_number] => 05828615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Reference potential generator and a semiconductor memory device having the same' [patent_app_type] => 1 [patent_app_number] => 8/785838 [patent_app_country] => US [patent_app_date] => 1997-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 30 [patent_no_of_words] => 11566 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828615.pdf [firstpage_image] =>[orig_patent_app_number] => 785838 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/785838
Reference potential generator and a semiconductor memory device having the same Jan 7, 1997 Issued
Array ( [id] => 3804686 [patent_doc_number] => 05726950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Synchronous semiconductor memory device performing input/output of data in a cycle shorter than an external clock signal cycle' [patent_app_type] => 1 [patent_app_number] => 8/779829 [patent_app_country] => US [patent_app_date] => 1997-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 9176 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/726/05726950.pdf [firstpage_image] =>[orig_patent_app_number] => 779829 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/779829
Synchronous semiconductor memory device performing input/output of data in a cycle shorter than an external clock signal cycle Jan 6, 1997 Issued
Array ( [id] => 4066672 [patent_doc_number] => RE036531 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Semiconductor memory device including memory cells connected to a ground line' [patent_app_type] => 2 [patent_app_number] => 8/775742 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 7908 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036531.pdf [firstpage_image] =>[orig_patent_app_number] => 775742 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/775742
Semiconductor memory device including memory cells connected to a ground line Dec 30, 1996 Issued
Array ( [id] => 3890282 [patent_doc_number] => 05729502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Semiconductor memory device that can read out data at high speed' [patent_app_type] => 1 [patent_app_number] => 8/775762 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 41 [patent_no_of_words] => 17185 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729502.pdf [firstpage_image] =>[orig_patent_app_number] => 775762 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/775762
Semiconductor memory device that can read out data at high speed Dec 30, 1996 Issued
Array ( [id] => 3807853 [patent_doc_number] => 05781483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Device and method for repairing a memory array by storing each bit in multiple memory cells in the array' [patent_app_type] => 1 [patent_app_number] => 8/775510 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8003 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781483.pdf [firstpage_image] =>[orig_patent_app_number] => 775510 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/775510
Device and method for repairing a memory array by storing each bit in multiple memory cells in the array Dec 30, 1996 Issued
Array ( [id] => 3797991 [patent_doc_number] => 05822247 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Device for generating and regulating a gate voltage in a non-volatile memory' [patent_app_type] => 1 [patent_app_number] => 8/775111 [patent_app_country] => US [patent_app_date] => 1996-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6473 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822247.pdf [firstpage_image] =>[orig_patent_app_number] => 775111 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/775111
Device for generating and regulating a gate voltage in a non-volatile memory Dec 29, 1996 Issued
Array ( [id] => 3792567 [patent_doc_number] => 05818790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Method for driving word lines in semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/777224 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4858 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818790.pdf [firstpage_image] =>[orig_patent_app_number] => 777224 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/777224
Method for driving word lines in semiconductor memory device Dec 26, 1996 Issued
Array ( [id] => 4061033 [patent_doc_number] => 05870330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Method of making and structure of SRAM storage cell with N channel thin film transistor load devices' [patent_app_type] => 1 [patent_app_number] => 8/774911 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1933 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/870/05870330.pdf [firstpage_image] =>[orig_patent_app_number] => 774911 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/774911
Method of making and structure of SRAM storage cell with N channel thin film transistor load devices Dec 26, 1996 Issued
Array ( [id] => 3873230 [patent_doc_number] => 05796652 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Non-volatile semiconductor memory capable of writing multi-value information' [patent_app_type] => 1 [patent_app_number] => 8/773834 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4985 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796652.pdf [firstpage_image] =>[orig_patent_app_number] => 773834 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/773834
Non-volatile semiconductor memory capable of writing multi-value information Dec 26, 1996 Issued
Array ( [id] => 3854040 [patent_doc_number] => 05745427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Phase-shifted embedded ram apparatus and method' [patent_app_type] => 1 [patent_app_number] => 8/773706 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2051 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745427.pdf [firstpage_image] =>[orig_patent_app_number] => 773706 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/773706
Phase-shifted embedded ram apparatus and method Dec 26, 1996 Issued
Array ( [id] => 3756974 [patent_doc_number] => 05717650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Row/column decoder circuits for a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/778720 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4785 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717650.pdf [firstpage_image] =>[orig_patent_app_number] => 778720 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/778720
Row/column decoder circuits for a semiconductor memory device Dec 26, 1996 Issued
Array ( [id] => 3970959 [patent_doc_number] => 05901086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Pipelined fast-access floating gate memory architecture and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/780120 [patent_app_country] => US [patent_app_date] => 1996-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6296 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/901/05901086.pdf [firstpage_image] =>[orig_patent_app_number] => 780120 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/780120
Pipelined fast-access floating gate memory architecture and method of operation Dec 25, 1996 Issued
Array ( [id] => 3854027 [patent_doc_number] => 05745426 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Memory card and circuit board used therefor' [patent_app_type] => 1 [patent_app_number] => 8/773332 [patent_app_country] => US [patent_app_date] => 1996-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3639 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745426.pdf [firstpage_image] =>[orig_patent_app_number] => 773332 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/773332
Memory card and circuit board used therefor Dec 23, 1996 Issued
Array ( [id] => 3789067 [patent_doc_number] => 05808932 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Memory system which enables storage and retrieval of more than two states in a memory cell' [patent_app_type] => 1 [patent_app_number] => 8/779991 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4534 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808932.pdf [firstpage_image] =>[orig_patent_app_number] => 779991 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/779991
Memory system which enables storage and retrieval of more than two states in a memory cell Dec 22, 1996 Issued
Array ( [id] => 3891801 [patent_doc_number] => 05798969 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Data output buffer control circuit of a synchronous semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/770784 [patent_app_country] => US [patent_app_date] => 1996-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2621 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798969.pdf [firstpage_image] =>[orig_patent_app_number] => 770784 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/770784
Data output buffer control circuit of a synchronous semiconductor memory device Dec 19, 1996 Issued
Array ( [id] => 3844660 [patent_doc_number] => 05761136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Circuit for generating a column switch enable signal of a memory' [patent_app_type] => 1 [patent_app_number] => 8/769990 [patent_app_country] => US [patent_app_date] => 1996-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 29 [patent_no_of_words] => 4620 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761136.pdf [firstpage_image] =>[orig_patent_app_number] => 769990 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/769990
Circuit for generating a column switch enable signal of a memory Dec 18, 1996 Issued
Array ( [id] => 4010607 [patent_doc_number] => 05923593 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Multi-port DRAM cell and memory system using same' [patent_app_type] => 1 [patent_app_number] => 8/767707 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5723 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923593.pdf [firstpage_image] =>[orig_patent_app_number] => 767707 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/767707
Multi-port DRAM cell and memory system using same Dec 16, 1996 Issued
Array ( [id] => 3873993 [patent_doc_number] => 05793694 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Semiconductor integrated circuit device having means for peak current reduction' [patent_app_type] => 1 [patent_app_number] => 8/767724 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 4441 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793694.pdf [firstpage_image] =>[orig_patent_app_number] => 767724 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/767724
Semiconductor integrated circuit device having means for peak current reduction Dec 16, 1996 Issued
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