Son Luu Mai

Array ( [id] => 3826090 [patent_doc_number] => 05771190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'Semiconductor static random access memory device having memory cells coupled to discharging line different in potential level to discharging line for write-in circuit' [patent_app_type] => 1 [patent_app_number] => 8/740483 [patent_app_country] => US [patent_app_date] => 1996-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7963 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/771/05771190.pdf [firstpage_image] =>[orig_patent_app_number] => 740483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3807822 [patent_doc_number] => 05781481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Semiconductor memory device with reduced leakage current and improved data retention' [patent_app_type] => 1 [patent_app_number] => 8/742181 [patent_app_country] => US [patent_app_date] => 1996-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3595 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781481.pdf [firstpage_image] =>[orig_patent_app_number] => 742181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3824964 [patent_doc_number] => 05812461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Driver circuit for addressing core memory and a method for the same' [patent_app_type] => 1 [patent_app_number] => 8/741207 [patent_app_country] => US [patent_app_date] => 1996-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 15220 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812461.pdf [firstpage_image] =>[orig_patent_app_number] => 741207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3639014 [patent_doc_number] => 05687134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Synchronous semiconductor memory capable of saving a latency with a reduced circuit scale' [patent_app_type] => 1 [patent_app_number] => 8/734082 [patent_app_country] => US [patent_app_date] => 1996-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4224 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687134.pdf [firstpage_image] =>[orig_patent_app_number] => 734082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3912827 [patent_doc_number] => 05751631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Flash memory cell and a new method for sensing the content of the new memory cell' [patent_app_type] => 1 [patent_app_number] => 8/735384 [patent_app_country] => US [patent_app_date] => 1996-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 4214 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751631.pdf [firstpage_image] =>[orig_patent_app_number] => 735384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3853525 [patent_doc_number] => 05847997 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'PC card' [patent_app_type] => 1 [patent_app_number] => 8/732164 [patent_app_country] => US [patent_app_date] => 1996-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5277 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/847/05847997.pdf [firstpage_image] =>[orig_patent_app_number] => 732164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3792215 [patent_doc_number] => 05818771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/723367 [patent_app_country] => US [patent_app_date] => 1996-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 10558 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818771.pdf [firstpage_image] =>[orig_patent_app_number] => 723367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3747366 [patent_doc_number] => 05699302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Mode register control circuit and semiconductor device having the same' [patent_app_type] => 1 [patent_app_number] => 8/715701 [patent_app_country] => US [patent_app_date] => 1996-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6388 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/699/05699302.pdf [firstpage_image] =>[orig_patent_app_number] => 715701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3659111 [patent_doc_number] => 05684740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Semiconductor memory and method for substituting a redundancy memory cell' [patent_app_type] => 1 [patent_app_number] => 8/715409 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6847 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684740.pdf [firstpage_image] =>[orig_patent_app_number] => 715409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3790211 [patent_doc_number] => 05757713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Adjustable write voltage circuit for SRAMS' [patent_app_type] => 1 [patent_app_number] => 8/715502 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2796 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757713.pdf [firstpage_image] =>[orig_patent_app_number] => 715502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3704350 [patent_doc_number] => 05680357 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'High speed, low noise, low power, electronic memory sensing scheme' [patent_app_type] => 1 [patent_app_number] => 8/709983 [patent_app_country] => US [patent_app_date] => 1996-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3908 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680357.pdf [firstpage_image] =>[orig_patent_app_number] => 709983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3706895 [patent_doc_number] => 05677883 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Semiconductor associative memory device with address corrector for generating formal address signal representative of one of regular memory words partially replaced with redundant memory word' [patent_app_type] => 1 [patent_app_number] => 8/704982 [patent_app_country] => US [patent_app_date] => 1996-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4222 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677883.pdf [firstpage_image] =>[orig_patent_app_number] => 704982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3844453 [patent_doc_number] => 05761120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Floating gate FPGA cell with select device on drain' [patent_app_type] => 1 [patent_app_number] => 8/703683 [patent_app_country] => US [patent_app_date] => 1996-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 5283 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761120.pdf [firstpage_image] =>[orig_patent_app_number] => 703683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3900814 [patent_doc_number] => 05777931 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Synchronized redundancy decoding systems and methods for integrated circuit memory devices' [patent_app_type] => 1 [patent_app_number] => 8/703204 [patent_app_country] => US [patent_app_date] => 1996-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3908 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/777/05777931.pdf [firstpage_image] =>[orig_patent_app_number] => 703204 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3697934 [patent_doc_number] => 05691937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Structure of split gate transistor for use in a non-volatile semiconductor memory and method of manufacturing such a split gate transistor' [patent_app_type] => 1 [patent_app_number] => 8/701013 [patent_app_country] => US [patent_app_date] => 1996-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 7487 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691937.pdf [firstpage_image] =>[orig_patent_app_number] => 701013 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3892253 [patent_doc_number] => 05748526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Circuit for repair of flash memory cells and a method of repair' [patent_app_type] => 1 [patent_app_number] => 8/698514 [patent_app_country] => US [patent_app_date] => 1996-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1828 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748526.pdf [firstpage_image] =>[orig_patent_app_number] => 698514 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3697920 [patent_doc_number] => 05691936 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Magnetoresistive element and memory element' [patent_app_type] => 1 [patent_app_number] => 8/702382 [patent_app_country] => US [patent_app_date] => 1996-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5147 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691936.pdf [firstpage_image] =>[orig_patent_app_number] => 702382 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3874007 [patent_doc_number] => 05793695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Semiconductor memory device having level-shifted precharge signal' [patent_app_type] => 1 [patent_app_number] => 8/696738 [patent_app_country] => US [patent_app_date] => 1996-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12351 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793695.pdf [firstpage_image] =>[orig_patent_app_number] => 696738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3790048 [patent_doc_number] => 05757701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Semiconductor memory device having serial access port' [patent_app_type] => 1 [patent_app_number] => 8/691013 [patent_app_country] => US [patent_app_date] => 1996-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 2569 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757701.pdf [firstpage_image] =>[orig_patent_app_number] => 691013 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3825015 [patent_doc_number] => 05812465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Redundancy circuit and method for providing word lines driven by a shift register' [patent_app_type] => 1 [patent_app_number] => 8/691357 [patent_app_country] => US [patent_app_date] => 1996-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2999 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812465.pdf [firstpage_image] =>[orig_patent_app_number] => 691357 [rel_patent_id] =>[rel_patent_doc_number] =>)