
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3706707
[patent_doc_number] => 05677870
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Non-volatile programmable bistable multivibrator, programmable by the source, for the memory redundancy circuit'
[patent_app_type] => 1
[patent_app_number] => 8/752814
[patent_app_country] => US
[patent_app_date] => 1996-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3354
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/677/05677870.pdf
[firstpage_image] =>[orig_patent_app_number] => 752814
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/752814 | Non-volatile programmable bistable multivibrator, programmable by the source, for the memory redundancy circuit | Nov 20, 1996 | Issued |
Array
(
[id] => 3764879
[patent_doc_number] => 05721700
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-24
[patent_title] => 'Non-volatile semiconductor memory device in which applied voltage to ferroelectric capacitor is adjusted'
[patent_app_type] => 1
[patent_app_number] => 8/754533
[patent_app_country] => US
[patent_app_date] => 1996-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 22
[patent_no_of_words] => 10334
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/721/05721700.pdf
[firstpage_image] =>[orig_patent_app_number] => 754533
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/754533 | Non-volatile semiconductor memory device in which applied voltage to ferroelectric capacitor is adjusted | Nov 20, 1996 | Issued |
Array
(
[id] => 3764961
[patent_doc_number] => 05721706
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-24
[patent_title] => 'Non-volatile-programmable bistable multivibrator, programmable by the source, for memory redundancy circuit'
[patent_app_type] => 1
[patent_app_number] => 8/754432
[patent_app_country] => US
[patent_app_date] => 1996-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3355
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/721/05721706.pdf
[firstpage_image] =>[orig_patent_app_number] => 754432
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/754432 | Non-volatile-programmable bistable multivibrator, programmable by the source, for memory redundancy circuit | Nov 20, 1996 | Issued |
Array
(
[id] => 3892297
[patent_doc_number] => 05748529
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-05
[patent_title] => 'Integrated circuit memory devices having direct read capability'
[patent_app_type] => 1
[patent_app_number] => 8/749332
[patent_app_country] => US
[patent_app_date] => 1996-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3066
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/748/05748529.pdf
[firstpage_image] =>[orig_patent_app_number] => 749332
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/749332 | Integrated circuit memory devices having direct read capability | Nov 13, 1996 | Issued |
Array
(
[id] => 3866896
[patent_doc_number] => 05768193
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Bit-refreshable method and circuit for refreshing a nonvolatile flash memory'
[patent_app_type] => 1
[patent_app_number] => 8/745034
[patent_app_country] => US
[patent_app_date] => 1996-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 8729
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/768/05768193.pdf
[firstpage_image] =>[orig_patent_app_number] => 745034
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/745034 | Bit-refreshable method and circuit for refreshing a nonvolatile flash memory | Nov 6, 1996 | Issued |
Array
(
[id] => 3892188
[patent_doc_number] => 05748521
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-05
[patent_title] => 'Metal plug capacitor structures for integrated circuit devices and related methods'
[patent_app_type] => 1
[patent_app_number] => 8/746129
[patent_app_country] => US
[patent_app_date] => 1996-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 3142
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/748/05748521.pdf
[firstpage_image] =>[orig_patent_app_number] => 746129
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/746129 | Metal plug capacitor structures for integrated circuit devices and related methods | Nov 5, 1996 | Issued |
Array
(
[id] => 3892791
[patent_doc_number] => 05748561
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-05
[patent_title] => 'Semiconductor memory device with fast successive read operation'
[patent_app_type] => 1
[patent_app_number] => 8/742338
[patent_app_country] => US
[patent_app_date] => 1996-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6458
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/748/05748561.pdf
[firstpage_image] =>[orig_patent_app_number] => 742338
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/742338 | Semiconductor memory device with fast successive read operation | Oct 31, 1996 | Issued |
Array
(
[id] => 3891919
[patent_doc_number] => 05798977
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-25
[patent_title] => 'Power line coupling prevention circuit for semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/742681
[patent_app_country] => US
[patent_app_date] => 1996-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1448
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/798/05798977.pdf
[firstpage_image] =>[orig_patent_app_number] => 742681
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/742681 | Power line coupling prevention circuit for semiconductor memory device | Oct 30, 1996 | Issued |
Array
(
[id] => 3826090
[patent_doc_number] => 05771190
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-23
[patent_title] => 'Semiconductor static random access memory device having memory cells coupled to discharging line different in potential level to discharging line for write-in circuit'
[patent_app_type] => 1
[patent_app_number] => 8/740483
[patent_app_country] => US
[patent_app_date] => 1996-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7963
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/771/05771190.pdf
[firstpage_image] =>[orig_patent_app_number] => 740483
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/740483 | Semiconductor static random access memory device having memory cells coupled to discharging line different in potential level to discharging line for write-in circuit | Oct 29, 1996 | Issued |
Array
(
[id] => 3807822
[patent_doc_number] => 05781481
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Semiconductor memory device with reduced leakage current and improved data retention'
[patent_app_type] => 1
[patent_app_number] => 8/742181
[patent_app_country] => US
[patent_app_date] => 1996-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3595
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/781/05781481.pdf
[firstpage_image] =>[orig_patent_app_number] => 742181
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/742181 | Semiconductor memory device with reduced leakage current and improved data retention | Oct 29, 1996 | Issued |
Array
(
[id] => 3824964
[patent_doc_number] => 05812461
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Driver circuit for addressing core memory and a method for the same'
[patent_app_type] => 1
[patent_app_number] => 8/741207
[patent_app_country] => US
[patent_app_date] => 1996-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 15220
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/812/05812461.pdf
[firstpage_image] =>[orig_patent_app_number] => 741207
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/741207 | Driver circuit for addressing core memory and a method for the same | Oct 28, 1996 | Issued |
Array
(
[id] => 3912827
[patent_doc_number] => 05751631
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Flash memory cell and a new method for sensing the content of the new memory cell'
[patent_app_type] => 1
[patent_app_number] => 8/735384
[patent_app_country] => US
[patent_app_date] => 1996-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 4214
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/751/05751631.pdf
[firstpage_image] =>[orig_patent_app_number] => 735384
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/735384 | Flash memory cell and a new method for sensing the content of the new memory cell | Oct 20, 1996 | Issued |
Array
(
[id] => 3639014
[patent_doc_number] => 05687134
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Synchronous semiconductor memory capable of saving a latency with a reduced circuit scale'
[patent_app_type] => 1
[patent_app_number] => 8/734082
[patent_app_country] => US
[patent_app_date] => 1996-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4224
[patent_no_of_claims] => 6
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/687/05687134.pdf
[firstpage_image] =>[orig_patent_app_number] => 734082
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/734082 | Synchronous semiconductor memory capable of saving a latency with a reduced circuit scale | Oct 20, 1996 | Issued |
Array
(
[id] => 3853525
[patent_doc_number] => 05847997
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-08
[patent_title] => 'PC card'
[patent_app_type] => 1
[patent_app_number] => 8/732164
[patent_app_country] => US
[patent_app_date] => 1996-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 5277
[patent_no_of_claims] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/847/05847997.pdf
[firstpage_image] =>[orig_patent_app_number] => 732164
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/732164 | PC card | Oct 15, 1996 | Issued |
Array
(
[id] => 3792215
[patent_doc_number] => 05818771
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/723367
[patent_app_country] => US
[patent_app_date] => 1996-09-30
[patent_effective_date] => 0000-00-00
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/818/05818771.pdf
[firstpage_image] =>[orig_patent_app_number] => 723367
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/723367 | Semiconductor memory device | Sep 29, 1996 | Issued |
Array
(
[id] => 3747366
[patent_doc_number] => 05699302
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-16
[patent_title] => 'Mode register control circuit and semiconductor device having the same'
[patent_app_type] => 1
[patent_app_number] => 8/715701
[patent_app_country] => US
[patent_app_date] => 1996-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/699/05699302.pdf
[firstpage_image] =>[orig_patent_app_number] => 715701
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/715701 | Mode register control circuit and semiconductor device having the same | Sep 18, 1996 | Issued |
Array
(
[id] => 3790211
[patent_doc_number] => 05757713
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'Adjustable write voltage circuit for SRAMS'
[patent_app_type] => 1
[patent_app_number] => 8/715502
[patent_app_country] => US
[patent_app_date] => 1996-09-18
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/757/05757713.pdf
[firstpage_image] =>[orig_patent_app_number] => 715502
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/715502 | Adjustable write voltage circuit for SRAMS | Sep 17, 1996 | Issued |
Array
(
[id] => 3659111
[patent_doc_number] => 05684740
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-04
[patent_title] => 'Semiconductor memory and method for substituting a redundancy memory cell'
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[patent_app_number] => 8/715409
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[pdf_file] => patents/05/684/05684740.pdf
[firstpage_image] =>[orig_patent_app_number] => 715409
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/715409 | Semiconductor memory and method for substituting a redundancy memory cell | Sep 17, 1996 | Issued |
Array
(
[id] => 3704350
[patent_doc_number] => 05680357
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-21
[patent_title] => 'High speed, low noise, low power, electronic memory sensing scheme'
[patent_app_type] => 1
[patent_app_number] => 8/709983
[patent_app_country] => US
[patent_app_date] => 1996-09-09
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[pdf_file] => patents/05/680/05680357.pdf
[firstpage_image] =>[orig_patent_app_number] => 709983
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/709983 | High speed, low noise, low power, electronic memory sensing scheme | Sep 8, 1996 | Issued |
Array
(
[id] => 3706895
[patent_doc_number] => 05677883
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Semiconductor associative memory device with address corrector for generating formal address signal representative of one of regular memory words partially replaced with redundant memory word'
[patent_app_type] => 1
[patent_app_number] => 8/704982
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4222
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[patent_words_short_claim] => 290
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/677/05677883.pdf
[firstpage_image] =>[orig_patent_app_number] => 704982
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/704982 | Semiconductor associative memory device with address corrector for generating formal address signal representative of one of regular memory words partially replaced with redundant memory word | Aug 28, 1996 | Issued |