Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3747260 [patent_doc_number] => 05699295 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Current detection circuit for reading a memory in integrated circuit form' [patent_app_type] => 1 [patent_app_number] => 8/649282 [patent_app_country] => US [patent_app_date] => 1996-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2136 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/699/05699295.pdf [firstpage_image] =>[orig_patent_app_number] => 649282 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649282
Current detection circuit for reading a memory in integrated circuit form May 16, 1996 Issued
Array ( [id] => 3841339 [patent_doc_number] => 05712817 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Highly integrated cell having a reading transistor and a writing transistor' [patent_app_type] => 1 [patent_app_number] => 8/648755 [patent_app_country] => US [patent_app_date] => 1996-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 4076 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712817.pdf [firstpage_image] =>[orig_patent_app_number] => 648755 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/648755
Highly integrated cell having a reading transistor and a writing transistor May 15, 1996 Issued
Array ( [id] => 3703640 [patent_doc_number] => 05661677 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Circuit and method for on-board programming of PRD Serial EEPROMS' [patent_app_type] => 1 [patent_app_number] => 8/648555 [patent_app_country] => US [patent_app_date] => 1996-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2781 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661677.pdf [firstpage_image] =>[orig_patent_app_number] => 648555 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/648555
Circuit and method for on-board programming of PRD Serial EEPROMS May 14, 1996 Issued
Array ( [id] => 3782588 [patent_doc_number] => 05757214 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'PWM driver for an inductive load with detector of a not regulating PWM condition' [patent_app_type] => 1 [patent_app_number] => 8/647851 [patent_app_country] => US [patent_app_date] => 1996-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 77 [patent_no_of_words] => 8932 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757214.pdf [firstpage_image] =>[orig_patent_app_number] => 647851 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/647851
PWM driver for an inductive load with detector of a not regulating PWM condition May 14, 1996 Issued
Array ( [id] => 3733125 [patent_doc_number] => 05673227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Integrated circuit memory with multiplexed redundant column data path' [patent_app_type] => 1 [patent_app_number] => 8/645856 [patent_app_country] => US [patent_app_date] => 1996-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3551 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/673/05673227.pdf [firstpage_image] =>[orig_patent_app_number] => 645856 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/645856
Integrated circuit memory with multiplexed redundant column data path May 13, 1996 Issued
Array ( [id] => 3638805 [patent_doc_number] => 05687119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Semiconductor memory device with floating gate electrode' [patent_app_type] => 1 [patent_app_number] => 8/646152 [patent_app_country] => US [patent_app_date] => 1996-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 50 [patent_no_of_words] => 6430 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687119.pdf [firstpage_image] =>[orig_patent_app_number] => 646152 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/646152
Semiconductor memory device with floating gate electrode May 6, 1996 Issued
Array ( [id] => 3892283 [patent_doc_number] => 05748528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'EEPROM memory device with simultaneous read and write sector capabilities' [patent_app_type] => 1 [patent_app_number] => 8/642813 [patent_app_country] => US [patent_app_date] => 1996-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5665 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748528.pdf [firstpage_image] =>[orig_patent_app_number] => 642813 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/642813
EEPROM memory device with simultaneous read and write sector capabilities May 2, 1996 Issued
Array ( [id] => 3742043 [patent_doc_number] => 05694366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'OP amp circuit with variable resistance and memory system including same' [patent_app_type] => 1 [patent_app_number] => 8/640456 [patent_app_country] => US [patent_app_date] => 1996-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 13625 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694366.pdf [firstpage_image] =>[orig_patent_app_number] => 640456 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/640456
OP amp circuit with variable resistance and memory system including same Apr 30, 1996 Issued
Array ( [id] => 3858465 [patent_doc_number] => 05719818 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-17 [patent_title] => 'Row decoder having triple transistor word line drivers' [patent_app_type] => 1 [patent_app_number] => 8/634282 [patent_app_country] => US [patent_app_date] => 1996-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5746 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/719/05719818.pdf [firstpage_image] =>[orig_patent_app_number] => 634282 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/634282
Row decoder having triple transistor word line drivers Apr 17, 1996 Issued
Array ( [id] => 4027363 [patent_doc_number] => 05881012 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/633684 [patent_app_country] => US [patent_app_date] => 1996-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9379 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881012.pdf [firstpage_image] =>[orig_patent_app_number] => 633684 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/633684
Semiconductor integrated circuit Apr 16, 1996 Issued
Array ( [id] => 3704433 [patent_doc_number] => 05680363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Semiconductor memory capable of transferring data at a high speed between an SRAM and a DRAM array' [patent_app_type] => 1 [patent_app_number] => 8/632279 [patent_app_country] => US [patent_app_date] => 1996-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 43 [patent_no_of_words] => 24515 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680363.pdf [firstpage_image] =>[orig_patent_app_number] => 632279 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632279
Semiconductor memory capable of transferring data at a high speed between an SRAM and a DRAM array Apr 14, 1996 Issued
Array ( [id] => 3638635 [patent_doc_number] => 05687108 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Power bussing layout for memory circuits' [patent_app_type] => 1 [patent_app_number] => 8/630283 [patent_app_country] => US [patent_app_date] => 1996-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1866 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687108.pdf [firstpage_image] =>[orig_patent_app_number] => 630283 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/630283
Power bussing layout for memory circuits Apr 9, 1996 Issued
Array ( [id] => 3897820 [patent_doc_number] => 05715205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Memory with a selectable data width and reduced decoding logic' [patent_app_type] => 1 [patent_app_number] => 8/624182 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5437 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715205.pdf [firstpage_image] =>[orig_patent_app_number] => 624182 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/624182
Memory with a selectable data width and reduced decoding logic Mar 28, 1996 Issued
Array ( [id] => 3704295 [patent_doc_number] => 05680354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Semiconductor memory device capable of reading information stored in a non-volatile manner in a particular operation mode' [patent_app_type] => 1 [patent_app_number] => 8/623552 [patent_app_country] => US [patent_app_date] => 1996-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6977 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680354.pdf [firstpage_image] =>[orig_patent_app_number] => 623552 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/623552
Semiconductor memory device capable of reading information stored in a non-volatile manner in a particular operation mode Mar 27, 1996 Issued
Array ( [id] => 3644610 [patent_doc_number] => 05610857 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Memory element with multibit storage' [patent_app_type] => 1 [patent_app_number] => 8/621857 [patent_app_country] => US [patent_app_date] => 1996-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1716 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610857.pdf [firstpage_image] =>[orig_patent_app_number] => 621857 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/621857
Memory element with multibit storage Mar 24, 1996 Issued
Array ( [id] => 3780069 [patent_doc_number] => 05850362 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Semiconductor memory device employing an improved layout of sense amplifiers' [patent_app_type] => 1 [patent_app_number] => 8/619418 [patent_app_country] => US [patent_app_date] => 1996-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8921 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/850/05850362.pdf [firstpage_image] =>[orig_patent_app_number] => 619418 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/619418
Semiconductor memory device employing an improved layout of sense amplifiers Mar 20, 1996 Issued
Array ( [id] => 3882741 [patent_doc_number] => 05838605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Iridium oxide local interconnect' [patent_app_type] => 1 [patent_app_number] => 8/618884 [patent_app_country] => US [patent_app_date] => 1996-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2442 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838605.pdf [firstpage_image] =>[orig_patent_app_number] => 618884 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/618884
Iridium oxide local interconnect Mar 19, 1996 Issued
Array ( [id] => 3674211 [patent_doc_number] => 05668757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Scalable flash eeprom memory cell and array' [patent_app_type] => 1 [patent_app_number] => 8/619258 [patent_app_country] => US [patent_app_date] => 1996-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8571 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668757.pdf [firstpage_image] =>[orig_patent_app_number] => 619258 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/619258
Scalable flash eeprom memory cell and array Mar 17, 1996 Issued
Array ( [id] => 3741116 [patent_doc_number] => 05666324 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Clock synchronous semiconductor memory device having current consumption reduced' [patent_app_type] => 1 [patent_app_number] => 8/616386 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 14729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666324.pdf [firstpage_image] =>[orig_patent_app_number] => 616386 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616386
Clock synchronous semiconductor memory device having current consumption reduced Mar 14, 1996 Issued
08/615733 METHOD AND CIRCUITRY FOR STORING DISCRETE AMOUNTS OF CHARGE IN A SINGLE MEMORY ELEMENT Mar 12, 1996 Abandoned
Menu