
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3644598
[patent_doc_number] => 05610856
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-11
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 8/610185
[patent_app_country] => US
[patent_app_date] => 1996-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 8593
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/610/05610856.pdf
[firstpage_image] =>[orig_patent_app_number] => 610185
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/610185 | Semiconductor integrated circuit device | Mar 3, 1996 | Issued |
Array
(
[id] => 3698047
[patent_doc_number] => 05691945
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Technique for reconfiguring a high density memory'
[patent_app_type] => 1
[patent_app_number] => 8/605100
[patent_app_country] => US
[patent_app_date] => 1996-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 6655
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/691/05691945.pdf
[firstpage_image] =>[orig_patent_app_number] => 605100
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/605100 | Technique for reconfiguring a high density memory | Feb 29, 1996 | Issued |
Array
(
[id] => 3764841
[patent_doc_number] => 05721698
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-24
[patent_title] => 'Read only memory device and manufacturing method'
[patent_app_type] => 1
[patent_app_number] => 8/604785
[patent_app_country] => US
[patent_app_date] => 1996-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 51
[patent_no_of_words] => 5759
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/721/05721698.pdf
[firstpage_image] =>[orig_patent_app_number] => 604785
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/604785 | Read only memory device and manufacturing method | Feb 22, 1996 | Issued |
Array
(
[id] => 3630601
[patent_doc_number] => 05615161
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-25
[patent_title] => 'Clocked sense amplifier with positive source feedback'
[patent_app_type] => 1
[patent_app_number] => 8/603882
[patent_app_country] => US
[patent_app_date] => 1996-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1776
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/615/05615161.pdf
[firstpage_image] =>[orig_patent_app_number] => 603882
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/603882 | Clocked sense amplifier with positive source feedback | Feb 21, 1996 | Issued |
Array
(
[id] => 3732044
[patent_doc_number] => 05682352
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-28
[patent_title] => 'Digital testing of analog memory devices'
[patent_app_type] => 1
[patent_app_number] => 8/598485
[patent_app_country] => US
[patent_app_date] => 1996-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4277
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/682/05682352.pdf
[firstpage_image] =>[orig_patent_app_number] => 598485
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/598485 | Digital testing of analog memory devices | Feb 7, 1996 | Issued |
Array
(
[id] => 3905309
[patent_doc_number] => 05835434
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'Internal voltage generating circuit, semiconductor memory device, and method of measuring current consumption, capable of measuring current consumption without cutting wire'
[patent_app_type] => 1
[patent_app_number] => 8/587684
[patent_app_country] => US
[patent_app_date] => 1996-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 6653
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/835/05835434.pdf
[firstpage_image] =>[orig_patent_app_number] => 587684
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/587684 | Internal voltage generating circuit, semiconductor memory device, and method of measuring current consumption, capable of measuring current consumption without cutting wire | Jan 16, 1996 | Issued |
Array
(
[id] => 3889382
[patent_doc_number] => 05825690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-20
[patent_title] => 'Semiconductor non-volatile storage device having verification potential applying device for re-writing to insufficiently written memory cells'
[patent_app_type] => 1
[patent_app_number] => 8/586084
[patent_app_country] => US
[patent_app_date] => 1996-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4471
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/825/05825690.pdf
[firstpage_image] =>[orig_patent_app_number] => 586084
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/586084 | Semiconductor non-volatile storage device having verification potential applying device for re-writing to insufficiently written memory cells | Jan 15, 1996 | Issued |
Array
(
[id] => 3841193
[patent_doc_number] => 05712811
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-27
[patent_title] => 'IC memory card'
[patent_app_type] => 1
[patent_app_number] => 8/583391
[patent_app_country] => US
[patent_app_date] => 1996-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 3157
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/712/05712811.pdf
[firstpage_image] =>[orig_patent_app_number] => 583391
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/583391 | IC memory card | Jan 4, 1996 | Issued |
Array
(
[id] => 3704709
[patent_doc_number] => 05596539
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Method and apparatus for a low power self-timed memory control system'
[patent_app_type] => 1
[patent_app_number] => 8/579792
[patent_app_country] => US
[patent_app_date] => 1995-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 10268
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/596/05596539.pdf
[firstpage_image] =>[orig_patent_app_number] => 579792
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/579792 | Method and apparatus for a low power self-timed memory control system | Dec 27, 1995 | Issued |
Array
(
[id] => 3845444
[patent_doc_number] => 05815433
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-29
[patent_title] => 'Mask ROM device with gate insulation film based in pad oxide film and/or nitride film'
[patent_app_type] => 1
[patent_app_number] => 8/572901
[patent_app_country] => US
[patent_app_date] => 1995-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 22
[patent_no_of_words] => 6155
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/815/05815433.pdf
[firstpage_image] =>[orig_patent_app_number] => 572901
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/572901 | Mask ROM device with gate insulation film based in pad oxide film and/or nitride film | Dec 21, 1995 | Issued |
Array
(
[id] => 3843886
[patent_doc_number] => 05740116
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Current limiting during block writes of memory circuits'
[patent_app_type] => 1
[patent_app_number] => 8/578885
[patent_app_country] => US
[patent_app_date] => 1995-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 3
[patent_no_of_words] => 3588
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/740/05740116.pdf
[firstpage_image] =>[orig_patent_app_number] => 578885
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/578885 | Current limiting during block writes of memory circuits | Dec 21, 1995 | Issued |
Array
(
[id] => 3669286
[patent_doc_number] => 05592425
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-07
[patent_title] => 'Method and apparatus for testing a memory where data is passed through the memory for comparison with data read from the memory'
[patent_app_type] => 1
[patent_app_number] => 8/576705
[patent_app_country] => US
[patent_app_date] => 1995-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2257
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/592/05592425.pdf
[firstpage_image] =>[orig_patent_app_number] => 576705
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/576705 | Method and apparatus for testing a memory where data is passed through the memory for comparison with data read from the memory | Dec 19, 1995 | Issued |
Array
(
[id] => 3632946
[patent_doc_number] => 05594690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Integrated circuit memory having high speed and low power by selectively coupling compensation components to a pulse generator'
[patent_app_type] => 1
[patent_app_number] => 8/573306
[patent_app_country] => US
[patent_app_date] => 1995-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 8636
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/594/05594690.pdf
[firstpage_image] =>[orig_patent_app_number] => 573306
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/573306 | Integrated circuit memory having high speed and low power by selectively coupling compensation components to a pulse generator | Dec 14, 1995 | Issued |
| 08/571393 | DYNAMIC RANDOM ACCESS MEMORY CELL HAVING INCREASED CAPACITANCE | Dec 12, 1995 | Abandoned |
Array
(
[id] => 3727505
[patent_doc_number] => 05617352
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-01
[patent_title] => 'Non-volatile, bidirectional, electrically programmable integrated memory element implemented using double polysilicon'
[patent_app_type] => 1
[patent_app_number] => 8/572205
[patent_app_country] => US
[patent_app_date] => 1995-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2796
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/617/05617352.pdf
[firstpage_image] =>[orig_patent_app_number] => 572205
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/572205 | Non-volatile, bidirectional, electrically programmable integrated memory element implemented using double polysilicon | Dec 12, 1995 | Issued |
Array
(
[id] => 3715726
[patent_doc_number] => 05654912
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => 'Semiconductor memory device with reduced read time and power consumption'
[patent_app_type] => 1
[patent_app_number] => 8/568500
[patent_app_country] => US
[patent_app_date] => 1995-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 37
[patent_no_of_words] => 6887
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/654/05654912.pdf
[firstpage_image] =>[orig_patent_app_number] => 568500
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/568500 | Semiconductor memory device with reduced read time and power consumption | Dec 6, 1995 | Issued |
Array
(
[id] => 3657591
[patent_doc_number] => 05640340
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-17
[patent_title] => 'Adjustable cell plate generator'
[patent_app_type] => 1
[patent_app_number] => 8/568833
[patent_app_country] => US
[patent_app_date] => 1995-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4135
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/640/05640340.pdf
[firstpage_image] =>[orig_patent_app_number] => 568833
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/568833 | Adjustable cell plate generator | Dec 6, 1995 | Issued |
Array
(
[id] => 3657804
[patent_doc_number] => 05638319
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-10
[patent_title] => 'Non-volatile random access memory and fabrication method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/567907
[patent_app_country] => US
[patent_app_date] => 1995-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 28
[patent_no_of_words] => 9096
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/638/05638319.pdf
[firstpage_image] =>[orig_patent_app_number] => 567907
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567907 | Non-volatile random access memory and fabrication method thereof | Dec 5, 1995 | Issued |
Array
(
[id] => 3704184
[patent_doc_number] => 05680348
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-21
[patent_title] => 'Power supply independent current source for FLASH EPROM erasure'
[patent_app_type] => 1
[patent_app_number] => 8/566204
[patent_app_country] => US
[patent_app_date] => 1995-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2443
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/680/05680348.pdf
[firstpage_image] =>[orig_patent_app_number] => 566204
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/566204 | Power supply independent current source for FLASH EPROM erasure | Nov 30, 1995 | Issued |
Array
(
[id] => 3613044
[patent_doc_number] => 05579272
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-26
[patent_title] => 'Semiconductor memory device with data compression test function and its testing method'
[patent_app_type] => 1
[patent_app_number] => 8/563797
[patent_app_country] => US
[patent_app_date] => 1995-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 5724
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/579/05579272.pdf
[firstpage_image] =>[orig_patent_app_number] => 563797
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/563797 | Semiconductor memory device with data compression test function and its testing method | Nov 27, 1995 | Issued |