
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3635355
[patent_doc_number] => 05608687
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-04
[patent_title] => 'Output driver control for ROM and RAM devices'
[patent_app_type] => 1
[patent_app_number] => 8/563212
[patent_app_country] => US
[patent_app_date] => 1995-11-27
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Array
(
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[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Memory device for synchronously reading and writing data'
[patent_app_type] => 1
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[patent_app_country] => US
[patent_app_date] => 1995-11-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/562194 | Memory device for synchronously reading and writing data | Nov 21, 1995 | Issued |
Array
(
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[patent_doc_number] => 05712820
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[patent_issue_date] => 1998-01-27
[patent_title] => 'Multiple word width memory array clocking scheme'
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[patent_app_country] => US
[patent_app_date] => 1995-11-17
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Array
(
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[patent_kind] => NA
[patent_issue_date] => 1997-04-08
[patent_title] => 'Bit line sensing in a memory array'
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Array
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Array
(
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[patent_doc_number] => 05625599
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[patent_issue_date] => 1997-04-29
[patent_title] => 'Semiconductor memory having decoded sense amplifier drive lines'
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Array
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[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/538085 | Method and apparatus for synchronized pipeline data access of a memory system | Oct 1, 1995 | Issued |
Array
(
[id] => 3664394
[patent_doc_number] => 05623437
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'Circuit having combined level conversion and logic function'
[patent_app_type] => 1
[patent_app_number] => 8/532291
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/532291 | Circuit having combined level conversion and logic function | Sep 21, 1995 | Issued |
Array
(
[id] => 3519119
[patent_doc_number] => 05587959
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[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Semiconductor memory device'
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Array
(
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[patent_title] => 'Efficient addressing of large memories'
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Array
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[patent_title] => 'Synchronous semiconductor memory device having a mode requiring an internal clock signal and a mode not requiring the internal clock signal'
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Array
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[id] => 3736432
[patent_doc_number] => 05652722
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Array
(
[id] => 3608804
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Array
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[patent_title] => 'Current amplification type mask-ROM'
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Array
(
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Array
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Array
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Array
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Array
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