
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3608804
[patent_doc_number] => 05559752
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Timing control circuit for synchronous static random access memory'
[patent_app_type] => 1
[patent_app_number] => 8/514693
[patent_app_country] => US
[patent_app_date] => 1995-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3468
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559752.pdf
[firstpage_image] =>[orig_patent_app_number] => 514693
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/514693 | Timing control circuit for synchronous static random access memory | Aug 13, 1995 | Issued |
Array
(
[id] => 3703126
[patent_doc_number] => 05650956
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Current amplification type mask-ROM'
[patent_app_type] => 1
[patent_app_number] => 8/513384
[patent_app_country] => US
[patent_app_date] => 1995-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 19
[patent_no_of_words] => 5092
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/650/05650956.pdf
[firstpage_image] =>[orig_patent_app_number] => 513384
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/513384 | Current amplification type mask-ROM | Aug 10, 1995 | Issued |
Array
(
[id] => 3553197
[patent_doc_number] => 05546018
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-13
[patent_title] => 'Fast carry structure with synchronous input'
[patent_app_type] => 1
[patent_app_number] => 8/513365
[patent_app_country] => US
[patent_app_date] => 1995-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 28
[patent_no_of_words] => 9259
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/546/05546018.pdf
[firstpage_image] =>[orig_patent_app_number] => 513365
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/513365 | Fast carry structure with synchronous input | Aug 8, 1995 | Issued |
Array
(
[id] => 3697733
[patent_doc_number] => 05663903
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-02
[patent_title] => 'Flat-cell read-only memory'
[patent_app_type] => 1
[patent_app_number] => 8/508532
[patent_app_country] => US
[patent_app_date] => 1995-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2867
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 302
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/663/05663903.pdf
[firstpage_image] =>[orig_patent_app_number] => 508532
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/508532 | Flat-cell read-only memory | Jul 27, 1995 | Issued |
Array
(
[id] => 3643956
[patent_doc_number] => 05631864
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-20
[patent_title] => 'Memory array having a reduced number of metal source lines'
[patent_app_type] => 1
[patent_app_number] => 8/509036
[patent_app_country] => US
[patent_app_date] => 1995-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2931
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/631/05631864.pdf
[firstpage_image] =>[orig_patent_app_number] => 509036
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/509036 | Memory array having a reduced number of metal source lines | Jul 27, 1995 | Issued |
Array
(
[id] => 3699104
[patent_doc_number] => 05604701
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-18
[patent_title] => 'Initializing a read pipeline of a non-volatile sequential memory device'
[patent_app_type] => 1
[patent_app_number] => 8/508331
[patent_app_country] => US
[patent_app_date] => 1995-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 5305
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/604/05604701.pdf
[firstpage_image] =>[orig_patent_app_number] => 508331
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/508331 | Initializing a read pipeline of a non-volatile sequential memory device | Jul 26, 1995 | Issued |
Array
(
[id] => 3667878
[patent_doc_number] => 05627779
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-06
[patent_title] => 'Non-volatile semiconductor memory having an array of non-volatile memory cells and method for driving the same'
[patent_app_type] => 1
[patent_app_number] => 8/505638
[patent_app_country] => US
[patent_app_date] => 1995-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 46
[patent_figures_cnt] => 68
[patent_no_of_words] => 19628
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/627/05627779.pdf
[firstpage_image] =>[orig_patent_app_number] => 505638
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/505638 | Non-volatile semiconductor memory having an array of non-volatile memory cells and method for driving the same | Jul 20, 1995 | Issued |
Array
(
[id] => 3601555
[patent_doc_number] => 05568438
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Sense amplifier with offset autonulling'
[patent_app_type] => 1
[patent_app_number] => 8/503529
[patent_app_country] => US
[patent_app_date] => 1995-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3872
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/568/05568438.pdf
[firstpage_image] =>[orig_patent_app_number] => 503529
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/503529 | Sense amplifier with offset autonulling | Jul 17, 1995 | Issued |
| 08/499390 | SEMICONDUCTOR MEMORY DEVICE WITH REDUCED DATA BUS LINE LOAD | Jul 6, 1995 | Abandoned |
Array
(
[id] => 3772321
[patent_doc_number] => 05742542
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-21
[patent_title] => 'Non-volatile memory cells using only positive charge to store data'
[patent_app_type] => 1
[patent_app_number] => 8/497992
[patent_app_country] => US
[patent_app_date] => 1995-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4128
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/742/05742542.pdf
[firstpage_image] =>[orig_patent_app_number] => 497992
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/497992 | Non-volatile memory cells using only positive charge to store data | Jul 2, 1995 | Issued |
Array
(
[id] => 3669939
[patent_doc_number] => 05648931
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-15
[patent_title] => 'High speed synchronous logic data latch apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/494998
[patent_app_country] => US
[patent_app_date] => 1995-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 73
[patent_no_of_words] => 4933
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 10
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/648/05648931.pdf
[firstpage_image] =>[orig_patent_app_number] => 494998
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/494998 | High speed synchronous logic data latch apparatus | Jun 26, 1995 | Issued |
Array
(
[id] => 3633350
[patent_doc_number] => 05594716
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Optical disk substrate and optical disk employing said optical disk substrate'
[patent_app_type] => 1
[patent_app_number] => 8/494178
[patent_app_country] => US
[patent_app_date] => 1995-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 10544
[patent_no_of_claims] => 4
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[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/594/05594716.pdf
[firstpage_image] =>[orig_patent_app_number] => 494178
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/494178 | Optical disk substrate and optical disk employing said optical disk substrate | Jun 22, 1995 | Issued |
Array
(
[id] => 3507677
[patent_doc_number] => 05532966
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Random access memory redundancy circuit employing fusible links'
[patent_app_type] => 1
[patent_app_number] => 8/490196
[patent_app_country] => US
[patent_app_date] => 1995-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 4556
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/532/05532966.pdf
[firstpage_image] =>[orig_patent_app_number] => 490196
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/490196 | Random access memory redundancy circuit employing fusible links | Jun 12, 1995 | Issued |
Array
(
[id] => 3636494
[patent_doc_number] => 05621686
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Multiply and divide current mirror'
[patent_app_type] => 1
[patent_app_number] => 8/480797
[patent_app_country] => US
[patent_app_date] => 1995-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2028
[patent_no_of_claims] => 20
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/621/05621686.pdf
[firstpage_image] =>[orig_patent_app_number] => 480797
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/480797 | Multiply and divide current mirror | Jun 6, 1995 | Issued |
Array
(
[id] => 3608507
[patent_doc_number] => 05559733
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Memory with ferroelectric capacitor connectable to transistor gate'
[patent_app_type] => 1
[patent_app_number] => 8/482765
[patent_app_country] => US
[patent_app_date] => 1995-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 7530
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559733.pdf
[firstpage_image] =>[orig_patent_app_number] => 482765
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/482765 | Memory with ferroelectric capacitor connectable to transistor gate | Jun 6, 1995 | Issued |
Array
(
[id] => 3867092
[patent_doc_number] => 05768206
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Circuit and method for biasing bit lines'
[patent_app_type] => 1
[patent_app_number] => 8/484491
[patent_app_country] => US
[patent_app_date] => 1995-06-07
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/768/05768206.pdf
[firstpage_image] =>[orig_patent_app_number] => 484491
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/484491 | Circuit and method for biasing bit lines | Jun 6, 1995 | Issued |
Array
(
[id] => 3678567
[patent_doc_number] => 05600605
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Auto-activate on synchronous dynamic random access memory'
[patent_app_type] => 1
[patent_app_number] => 8/481920
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600605.pdf
[firstpage_image] =>[orig_patent_app_number] => 481920
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/481920 | Auto-activate on synchronous dynamic random access memory | Jun 6, 1995 | Issued |
Array
(
[id] => 3703254
[patent_doc_number] => 05650964
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Method of inhibiting degradation of ultra short channel charge-carrying devices during discharge'
[patent_app_type] => 1
[patent_app_number] => 8/486192
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/650/05650964.pdf
[firstpage_image] =>[orig_patent_app_number] => 486192
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/486192 | Method of inhibiting degradation of ultra short channel charge-carrying devices during discharge | Jun 6, 1995 | Issued |
Array
(
[id] => 3633034
[patent_doc_number] => 05594696
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Improvemetns in a detection circuit with a level shifting circuit'
[patent_app_type] => 1
[patent_app_number] => 8/487841
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[pdf_file] => patents/05/594/05594696.pdf
[firstpage_image] =>[orig_patent_app_number] => 487841
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/487841 | Improvemetns in a detection circuit with a level shifting circuit | Jun 6, 1995 | Issued |
Array
(
[id] => 3582428
[patent_doc_number] => 05539689
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Nonvolatile semiconductor storage device and semiconductor device'
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[patent_app_country] => US
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[pdf_file] => patents/05/539/05539689.pdf
[firstpage_image] =>[orig_patent_app_number] => 462725
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/462725 | Nonvolatile semiconductor storage device and semiconductor device | Jun 4, 1995 | Issued |