
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 08/499390 | SEMICONDUCTOR MEMORY DEVICE WITH REDUCED DATA BUS LINE LOAD | Jul 6, 1995 | Abandoned |
Array
(
[id] => 3772321
[patent_doc_number] => 05742542
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-21
[patent_title] => 'Non-volatile memory cells using only positive charge to store data'
[patent_app_type] => 1
[patent_app_number] => 8/497992
[patent_app_country] => US
[patent_app_date] => 1995-07-03
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4128
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[firstpage_image] =>[orig_patent_app_number] => 497992
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/497992 | Non-volatile memory cells using only positive charge to store data | Jul 2, 1995 | Issued |
Array
(
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[patent_doc_number] => 05648931
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-15
[patent_title] => 'High speed synchronous logic data latch apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/494998
[patent_app_country] => US
[patent_app_date] => 1995-06-27
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 494998
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/494998 | High speed synchronous logic data latch apparatus | Jun 26, 1995 | Issued |
Array
(
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[patent_doc_number] => 05594716
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[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Optical disk substrate and optical disk employing said optical disk substrate'
[patent_app_type] => 1
[patent_app_number] => 8/494178
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[patent_app_date] => 1995-06-23
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[firstpage_image] =>[orig_patent_app_number] => 494178
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/494178 | Optical disk substrate and optical disk employing said optical disk substrate | Jun 22, 1995 | Issued |
Array
(
[id] => 3507677
[patent_doc_number] => 05532966
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Random access memory redundancy circuit employing fusible links'
[patent_app_type] => 1
[patent_app_number] => 8/490196
[patent_app_country] => US
[patent_app_date] => 1995-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[firstpage_image] =>[orig_patent_app_number] => 490196
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Array
(
[id] => 3608507
[patent_doc_number] => 05559733
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Memory with ferroelectric capacitor connectable to transistor gate'
[patent_app_type] => 1
[patent_app_number] => 8/482765
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/482765 | Memory with ferroelectric capacitor connectable to transistor gate | Jun 6, 1995 | Issued |
Array
(
[id] => 3867092
[patent_doc_number] => 05768206
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Circuit and method for biasing bit lines'
[patent_app_type] => 1
[patent_app_number] => 8/484491
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[firstpage_image] =>[orig_patent_app_number] => 484491
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/484491 | Circuit and method for biasing bit lines | Jun 6, 1995 | Issued |
Array
(
[id] => 3633034
[patent_doc_number] => 05594696
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Improvemetns in a detection circuit with a level shifting circuit'
[patent_app_type] => 1
[patent_app_number] => 8/487841
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[pdf_file] => patents/05/594/05594696.pdf
[firstpage_image] =>[orig_patent_app_number] => 487841
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/487841 | Improvemetns in a detection circuit with a level shifting circuit | Jun 6, 1995 | Issued |
Array
(
[id] => 3678567
[patent_doc_number] => 05600605
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Auto-activate on synchronous dynamic random access memory'
[patent_app_type] => 1
[patent_app_number] => 8/481920
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[firstpage_image] =>[orig_patent_app_number] => 481920
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/481920 | Auto-activate on synchronous dynamic random access memory | Jun 6, 1995 | Issued |
Array
(
[id] => 3636494
[patent_doc_number] => 05621686
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Multiply and divide current mirror'
[patent_app_type] => 1
[patent_app_number] => 8/480797
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[pdf_file] => patents/05/621/05621686.pdf
[firstpage_image] =>[orig_patent_app_number] => 480797
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/480797 | Multiply and divide current mirror | Jun 6, 1995 | Issued |
Array
(
[id] => 3703254
[patent_doc_number] => 05650964
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Method of inhibiting degradation of ultra short channel charge-carrying devices during discharge'
[patent_app_type] => 1
[patent_app_number] => 8/486192
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[patent_drawing_sheets_cnt] => 18
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[pdf_file] => patents/05/650/05650964.pdf
[firstpage_image] =>[orig_patent_app_number] => 486192
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Array
(
[id] => 3582984
[patent_doc_number] => 05539724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Optical disk having wobbled, discontinuous grooves'
[patent_app_type] => 1
[patent_app_number] => 8/471615
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[pdf_file] => patents/05/539/05539724.pdf
[firstpage_image] =>[orig_patent_app_number] => 471615
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/471615 | Optical disk having wobbled, discontinuous grooves | Jun 4, 1995 | Issued |
Array
(
[id] => 3582428
[patent_doc_number] => 05539689
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Nonvolatile semiconductor storage device and semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/462725
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[firstpage_image] =>[orig_patent_app_number] => 462725
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/462725 | Nonvolatile semiconductor storage device and semiconductor device | Jun 4, 1995 | Issued |
Array
(
[id] => 3705422
[patent_doc_number] => 05619473
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-08
[patent_title] => 'Semiconductor memory device with dual address memory read amplifiers'
[patent_app_type] => 1
[patent_app_number] => 8/459792
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[patent_app_date] => 1995-06-02
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[pdf_file] => patents/05/619/05619473.pdf
[firstpage_image] =>[orig_patent_app_number] => 459792
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/459792 | Semiconductor memory device with dual address memory read amplifiers | Jun 1, 1995 | Issued |
Array
(
[id] => 3643999
[patent_doc_number] => 05631867
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-20
[patent_title] => 'Semiconductor storage device requiring short time for program voltage to rise'
[patent_app_type] => 1
[patent_app_number] => 8/456328
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[patent_app_date] => 1995-06-01
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[pdf_file] => patents/05/631/05631867.pdf
[firstpage_image] =>[orig_patent_app_number] => 456328
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/456328 | Semiconductor storage device requiring short time for program voltage to rise | May 31, 1995 | Issued |
Array
(
[id] => 3612853
[patent_doc_number] => 05579259
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-26
[patent_title] => 'Low voltage erase of a flash EEPROM system having a common erase electrode for two individually erasable sectors'
[patent_app_type] => 1
[patent_app_number] => 8/453124
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/453124 | Low voltage erase of a flash EEPROM system having a common erase electrode for two individually erasable sectors | May 30, 1995 | Issued |
Array
(
[id] => 3633148
[patent_doc_number] => 05602777
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-11
[patent_title] => 'Semiconductor memory device having floating gate transistors and data holding means'
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[patent_app_number] => 8/449022
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[firstpage_image] =>[orig_patent_app_number] => 449022
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/449022 | Semiconductor memory device having floating gate transistors and data holding means | May 23, 1995 | Issued |
Array
(
[id] => 3632906
[patent_doc_number] => 05594687
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase'
[patent_app_type] => 1
[patent_app_number] => 8/447991
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/447991 | Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase | May 22, 1995 | Issued |
Array
(
[id] => 3712940
[patent_doc_number] => 05675541
[patent_country] => US
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[patent_issue_date] => 1997-10-07
[patent_title] => 'Device comprising means for validating data written in a memory'
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[firstpage_image] =>[orig_patent_app_number] => 445989
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/445989 | Device comprising means for validating data written in a memory | May 21, 1995 | Issued |
Array
(
[id] => 3678595
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[patent_country] => US
[patent_kind] => NA
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[firstpage_image] =>[orig_patent_app_number] => 435691
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/435691 | Semiconductor memory device that can read out data at high speed | May 4, 1995 | Issued |