
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3608607
[patent_doc_number] => 05559740
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Image memory apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/432689
[patent_app_country] => US
[patent_app_date] => 1995-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5300
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559740.pdf
[firstpage_image] =>[orig_patent_app_number] => 432689
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/432689 | Image memory apparatus | May 1, 1995 | Issued |
Array
(
[id] => 3526806
[patent_doc_number] => 05576988
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-19
[patent_title] => 'Secure non-volatile memory array'
[patent_app_type] => 1
[patent_app_number] => 8/430017
[patent_app_country] => US
[patent_app_date] => 1995-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 5417
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/576/05576988.pdf
[firstpage_image] =>[orig_patent_app_number] => 430017
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/430017 | Secure non-volatile memory array | Apr 26, 1995 | Issued |
Array
(
[id] => 3566884
[patent_doc_number] => 05502676
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-26
[patent_title] => 'Integrated circuit memory with column redundancy having shared read global data lines'
[patent_app_type] => 1
[patent_app_number] => 8/426994
[patent_app_country] => US
[patent_app_date] => 1995-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6160
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/502/05502676.pdf
[firstpage_image] =>[orig_patent_app_number] => 426994
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/426994 | Integrated circuit memory with column redundancy having shared read global data lines | Apr 23, 1995 | Issued |
Array
(
[id] => 3704486
[patent_doc_number] => 05596524
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'CMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and erase'
[patent_app_type] => 1
[patent_app_number] => 8/427117
[patent_app_country] => US
[patent_app_date] => 1995-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 3603
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/596/05596524.pdf
[firstpage_image] =>[orig_patent_app_number] => 427117
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/427117 | CMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and erase | Apr 20, 1995 | Issued |
Array
(
[id] => 3612882
[patent_doc_number] => 05579261
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-26
[patent_title] => 'Reduced column leakage during programming for a flash memory array'
[patent_app_type] => 1
[patent_app_number] => 8/426716
[patent_app_country] => US
[patent_app_date] => 1995-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2919
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/579/05579261.pdf
[firstpage_image] =>[orig_patent_app_number] => 426716
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/426716 | Reduced column leakage during programming for a flash memory array | Apr 20, 1995 | Issued |
Array
(
[id] => 3597097
[patent_doc_number] => 05553055
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-03
[patent_title] => 'Disc playback method'
[patent_app_type] => 1
[patent_app_number] => 8/426464
[patent_app_country] => US
[patent_app_date] => 1995-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5475
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/553/05553055.pdf
[firstpage_image] =>[orig_patent_app_number] => 426464
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/426464 | Disc playback method | Apr 18, 1995 | Issued |
Array
(
[id] => 3562473
[patent_doc_number] => 05493530
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-20
[patent_title] => 'Ram with pre-input register logic'
[patent_app_type] => 1
[patent_app_number] => 8/425666
[patent_app_country] => US
[patent_app_date] => 1995-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 3085
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/493/05493530.pdf
[firstpage_image] =>[orig_patent_app_number] => 425666
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/425666 | Ram with pre-input register logic | Apr 16, 1995 | Issued |
Array
(
[id] => 3520893
[patent_doc_number] => 05563826
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-08
[patent_title] => 'Memory array cell reading circuit with extra current branch'
[patent_app_type] => 1
[patent_app_number] => 8/422813
[patent_app_country] => US
[patent_app_date] => 1995-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4302
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/563/05563826.pdf
[firstpage_image] =>[orig_patent_app_number] => 422813
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/422813 | Memory array cell reading circuit with extra current branch | Apr 16, 1995 | Issued |
Array
(
[id] => 3601297
[patent_doc_number] => 05568423
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Flash memory wear leveling system providing immediate direct access to microprocessor'
[patent_app_type] => 1
[patent_app_number] => 8/422119
[patent_app_country] => US
[patent_app_date] => 1995-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3555
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/568/05568423.pdf
[firstpage_image] =>[orig_patent_app_number] => 422119
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/422119 | Flash memory wear leveling system providing immediate direct access to microprocessor | Apr 13, 1995 | Issued |
Array
(
[id] => 3544742
[patent_doc_number] => 05557571
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-17
[patent_title] => 'Dynamic random access memory with internal testing switches'
[patent_app_type] => 1
[patent_app_number] => 8/422411
[patent_app_country] => US
[patent_app_date] => 1995-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 3083
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/557/05557571.pdf
[firstpage_image] =>[orig_patent_app_number] => 422411
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/422411 | Dynamic random access memory with internal testing switches | Apr 13, 1995 | Issued |
Array
(
[id] => 3632877
[patent_doc_number] => 05594685
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Method for programming a single EPROM or flash memory cell to store multiple bits of data that utilizes a punchthrough current'
[patent_app_type] => 1
[patent_app_number] => 8/422146
[patent_app_country] => US
[patent_app_date] => 1995-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4075
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/594/05594685.pdf
[firstpage_image] =>[orig_patent_app_number] => 422146
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/422146 | Method for programming a single EPROM or flash memory cell to store multiple bits of data that utilizes a punchthrough current | Apr 12, 1995 | Issued |
| 08/420335 | A SEMICONDUCTOR MEMORY DEVICE EMPLOYING AN IMPROVED LAYOUT OF SENSE AMPLIFIERS | Apr 10, 1995 | Abandoned |
Array
(
[id] => 3467269
[patent_doc_number] => 05473560
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Method of reading data and read-only memory circuit'
[patent_app_type] => 1
[patent_app_number] => 8/420433
[patent_app_country] => US
[patent_app_date] => 1995-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5243
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473560.pdf
[firstpage_image] =>[orig_patent_app_number] => 420433
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/420433 | Method of reading data and read-only memory circuit | Apr 9, 1995 | Issued |
| 08/414793 | METHOD AND CIRCUITRY FOR STORING DISCRETE AMOUNTS OF CHARGE IN A SINGLE MEMORY ELEMENT | Mar 30, 1995 | Abandoned |
Array
(
[id] => 3678408
[patent_doc_number] => 05600594
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Threshold voltage measuring device for memory cells'
[patent_app_type] => 1
[patent_app_number] => 8/412326
[patent_app_country] => US
[patent_app_date] => 1995-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2597
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600594.pdf
[firstpage_image] =>[orig_patent_app_number] => 412326
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/412326 | Threshold voltage measuring device for memory cells | Mar 30, 1995 | Issued |
Array
(
[id] => 3560947
[patent_doc_number] => 05572478
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-05
[patent_title] => 'Power supply unit for an IC memory card'
[patent_app_type] => 1
[patent_app_number] => 8/414194
[patent_app_country] => US
[patent_app_date] => 1995-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 33
[patent_no_of_words] => 6651
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/572/05572478.pdf
[firstpage_image] =>[orig_patent_app_number] => 414194
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/414194 | Power supply unit for an IC memory card | Mar 30, 1995 | Issued |
Array
(
[id] => 3600683
[patent_doc_number] => 05586098
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Optical disc apparatus for controlling laser power for each zone of a zone record system'
[patent_app_type] => 1
[patent_app_number] => 8/407966
[patent_app_country] => US
[patent_app_date] => 1995-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5739
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 392
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/586/05586098.pdf
[firstpage_image] =>[orig_patent_app_number] => 407966
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/407966 | Optical disc apparatus for controlling laser power for each zone of a zone record system | Mar 21, 1995 | Issued |
Array
(
[id] => 3537704
[patent_doc_number] => 05541907
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-30
[patent_title] => 'Circuit for discriminating pre-mastered pits and pre-mastered grooves on optical disk'
[patent_app_type] => 1
[patent_app_number] => 8/407563
[patent_app_country] => US
[patent_app_date] => 1995-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 2941
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/541/05541907.pdf
[firstpage_image] =>[orig_patent_app_number] => 407563
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/407563 | Circuit for discriminating pre-mastered pits and pre-mastered grooves on optical disk | Mar 20, 1995 | Issued |
Array
(
[id] => 3585144
[patent_doc_number] => 05523971
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'Non-volatile memory cell for programmable logic device'
[patent_app_type] => 1
[patent_app_number] => 8/405490
[patent_app_country] => US
[patent_app_date] => 1995-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2360
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/523/05523971.pdf
[firstpage_image] =>[orig_patent_app_number] => 405490
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/405490 | Non-volatile memory cell for programmable logic device | Mar 15, 1995 | Issued |
Array
(
[id] => 3633219
[patent_doc_number] => 05602781
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-11
[patent_title] => 'Memory device having a plurality of sets of data buffers'
[patent_app_type] => 1
[patent_app_number] => 8/405126
[patent_app_country] => US
[patent_app_date] => 1995-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 9773
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/602/05602781.pdf
[firstpage_image] =>[orig_patent_app_number] => 405126
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/405126 | Memory device having a plurality of sets of data buffers | Mar 15, 1995 | Issued |