Son Luu Mai

Array ( [id] => 3582984 [patent_doc_number] => 05539724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Optical disk having wobbled, discontinuous grooves' [patent_app_type] => 1 [patent_app_number] => 8/471615 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3601 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539724.pdf [firstpage_image] =>[orig_patent_app_number] => 471615 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3705422 [patent_doc_number] => 05619473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Semiconductor memory device with dual address memory read amplifiers' [patent_app_type] => 1 [patent_app_number] => 8/459792 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6458 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619473.pdf [firstpage_image] =>[orig_patent_app_number] => 459792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3643999 [patent_doc_number] => 05631867 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'Semiconductor storage device requiring short time for program voltage to rise' [patent_app_type] => 1 [patent_app_number] => 8/456328 [patent_app_country] => US [patent_app_date] => 1995-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5353 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631867.pdf [firstpage_image] =>[orig_patent_app_number] => 456328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3612853 [patent_doc_number] => 05579259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Low voltage erase of a flash EEPROM system having a common erase electrode for two individually erasable sectors' [patent_app_type] => 1 [patent_app_number] => 8/453124 [patent_app_country] => US [patent_app_date] => 1995-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 4585 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579259.pdf [firstpage_image] =>[orig_patent_app_number] => 453124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3633148 [patent_doc_number] => 05602777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'Semiconductor memory device having floating gate transistors and data holding means' [patent_app_type] => 1 [patent_app_number] => 8/449022 [patent_app_country] => US [patent_app_date] => 1995-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 8694 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/602/05602777.pdf [firstpage_image] =>[orig_patent_app_number] => 449022 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3632906 [patent_doc_number] => 05594687 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase' [patent_app_type] => 1 [patent_app_number] => 8/447991 [patent_app_country] => US [patent_app_date] => 1995-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4107 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594687.pdf [firstpage_image] =>[orig_patent_app_number] => 447991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3712940 [patent_doc_number] => 05675541 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Device comprising means for validating data written in a memory' [patent_app_type] => 1 [patent_app_number] => 8/445989 [patent_app_country] => US [patent_app_date] => 1995-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1226 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675541.pdf [firstpage_image] =>[orig_patent_app_number] => 445989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3678595 [patent_doc_number] => 05600607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-04 [patent_title] => 'Semiconductor memory device that can read out data at high speed' [patent_app_type] => 1 [patent_app_number] => 8/435691 [patent_app_country] => US [patent_app_date] => 1995-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 41 [patent_no_of_words] => 17184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/600/05600607.pdf [firstpage_image] =>[orig_patent_app_number] => 435691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3608607 [patent_doc_number] => 05559740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Image memory apparatus' [patent_app_type] => 1 [patent_app_number] => 8/432689 [patent_app_country] => US [patent_app_date] => 1995-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5300 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/559/05559740.pdf [firstpage_image] =>[orig_patent_app_number] => 432689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3526806 [patent_doc_number] => 05576988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Secure non-volatile memory array' [patent_app_type] => 1 [patent_app_number] => 8/430017 [patent_app_country] => US [patent_app_date] => 1995-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5417 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576988.pdf [firstpage_image] =>[orig_patent_app_number] => 430017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3566884 [patent_doc_number] => 05502676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-26 [patent_title] => 'Integrated circuit memory with column redundancy having shared read global data lines' [patent_app_type] => 1 [patent_app_number] => 8/426994 [patent_app_country] => US [patent_app_date] => 1995-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6160 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/502/05502676.pdf [firstpage_image] =>[orig_patent_app_number] => 426994 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3704486 [patent_doc_number] => 05596524 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'CMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and erase' [patent_app_type] => 1 [patent_app_number] => 8/427117 [patent_app_country] => US [patent_app_date] => 1995-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3603 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596524.pdf [firstpage_image] =>[orig_patent_app_number] => 427117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3612882 [patent_doc_number] => 05579261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Reduced column leakage during programming for a flash memory array' [patent_app_type] => 1 [patent_app_number] => 8/426716 [patent_app_country] => US [patent_app_date] => 1995-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2919 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579261.pdf [firstpage_image] =>[orig_patent_app_number] => 426716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3597097 [patent_doc_number] => 05553055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Disc playback method' [patent_app_type] => 1 [patent_app_number] => 8/426464 [patent_app_country] => US [patent_app_date] => 1995-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5475 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553055.pdf [firstpage_image] =>[orig_patent_app_number] => 426464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3520893 [patent_doc_number] => 05563826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Memory array cell reading circuit with extra current branch' [patent_app_type] => 1 [patent_app_number] => 8/422813 [patent_app_country] => US [patent_app_date] => 1995-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4302 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/563/05563826.pdf [firstpage_image] =>[orig_patent_app_number] => 422813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3562473 [patent_doc_number] => 05493530 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-20 [patent_title] => 'Ram with pre-input register logic' [patent_app_type] => 1 [patent_app_number] => 8/425666 [patent_app_country] => US [patent_app_date] => 1995-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3085 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/493/05493530.pdf [firstpage_image] =>[orig_patent_app_number] => 425666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3601297 [patent_doc_number] => 05568423 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Flash memory wear leveling system providing immediate direct access to microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/422119 [patent_app_country] => US [patent_app_date] => 1995-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3555 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568423.pdf [firstpage_image] =>[orig_patent_app_number] => 422119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3544742 [patent_doc_number] => 05557571 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Dynamic random access memory with internal testing switches' [patent_app_type] => 1 [patent_app_number] => 8/422411 [patent_app_country] => US [patent_app_date] => 1995-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3083 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557571.pdf [firstpage_image] =>[orig_patent_app_number] => 422411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3632877 [patent_doc_number] => 05594685 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Method for programming a single EPROM or flash memory cell to store multiple bits of data that utilizes a punchthrough current' [patent_app_type] => 1 [patent_app_number] => 8/422146 [patent_app_country] => US [patent_app_date] => 1995-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4075 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594685.pdf [firstpage_image] =>[orig_patent_app_number] => 422146 [rel_patent_id] =>[rel_patent_doc_number] =>)