Son Luu Mai

Array ( [id] => 3598511 [patent_doc_number] => 05517442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Random access memory and an improved bus arrangement therefor' [patent_app_type] => 1 [patent_app_number] => 8/402790 [patent_app_country] => US [patent_app_date] => 1995-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2129 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517442.pdf [firstpage_image] =>[orig_patent_app_number] => 402790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3618074 [patent_doc_number] => 05590088 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Semiconductor memory device with enable signal conversion circuit operative for reducing current consumption' [patent_app_type] => 1 [patent_app_number] => 8/403691 [patent_app_country] => US [patent_app_date] => 1995-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4299 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590088.pdf [firstpage_image] =>[orig_patent_app_number] => 403691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3601270 [patent_doc_number] => 05568421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Semiconductor memory device on which selective transistors are connected to a plurality of respective memory cell units' [patent_app_type] => 1 [patent_app_number] => 8/402822 [patent_app_country] => US [patent_app_date] => 1995-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 6927 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568421.pdf [firstpage_image] =>[orig_patent_app_number] => 402822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3602832 [patent_doc_number] => 05521865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-28 [patent_title] => 'Non-volatile semiconductor memory device for storing multi-value data' [patent_app_type] => 1 [patent_app_number] => 8/401789 [patent_app_country] => US [patent_app_date] => 1995-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 36 [patent_no_of_words] => 22151 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/521/05521865.pdf [firstpage_image] =>[orig_patent_app_number] => 401789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3600392 [patent_doc_number] => 05586079 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Address generating and decoding device and method with increased decoding speed' [patent_app_type] => 1 [patent_app_number] => 8/401927 [patent_app_country] => US [patent_app_date] => 1995-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6118 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/586/05586079.pdf [firstpage_image] =>[orig_patent_app_number] => 401927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3668460 [patent_doc_number] => 05627816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-06 [patent_title] => 'Multilayer optical disk and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/401428 [patent_app_country] => US [patent_app_date] => 1995-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 7825 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/627/05627816.pdf [firstpage_image] =>[orig_patent_app_number] => 401428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3500956 [patent_doc_number] => 05561631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'High-speed minimal logic self blank checking method for programmable logic device' [patent_app_type] => 1 [patent_app_number] => 8/397821 [patent_app_country] => US [patent_app_date] => 1995-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561631.pdf [firstpage_image] =>[orig_patent_app_number] => 397821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3598536 [patent_doc_number] => 05517444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Semiconductor memory device with resistive power supply connection' [patent_app_type] => 1 [patent_app_number] => 8/397730 [patent_app_country] => US [patent_app_date] => 1995-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10522 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517444.pdf [firstpage_image] =>[orig_patent_app_number] => 397730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3601653 [patent_doc_number] => 05568445 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Synchronous semiconductor memory device with a write latency control function' [patent_app_type] => 1 [patent_app_number] => 8/397690 [patent_app_country] => US [patent_app_date] => 1995-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 4878 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568445.pdf [firstpage_image] =>[orig_patent_app_number] => 397690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3558293 [patent_doc_number] => 05555526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Synchronous semiconductor memory device having an auto-precharge function' [patent_app_type] => 1 [patent_app_number] => 8/397689 [patent_app_country] => US [patent_app_date] => 1995-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4496 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/555/05555526.pdf [firstpage_image] =>[orig_patent_app_number] => 397689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3600724 [patent_doc_number] => 05586101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Magneto-optic data storage system with differential detection channels having separate gain control circuit' [patent_app_type] => 1 [patent_app_number] => 8/397293 [patent_app_country] => US [patent_app_date] => 1995-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/586/05586101.pdf [firstpage_image] =>[orig_patent_app_number] => 397293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3482296 [patent_doc_number] => 05477485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-19 [patent_title] => 'Method for programming a single EPROM or FLASH memory cell to store multiple levels of data that utilizes a floating substrate' [patent_app_type] => 1 [patent_app_number] => 8/392087 [patent_app_country] => US [patent_app_date] => 1995-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4280 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/477/05477485.pdf [firstpage_image] =>[orig_patent_app_number] => 392087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3697762 [patent_doc_number] => 05644540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Redundancy elements using thin film transistors (TFTs)' [patent_app_type] => 1 [patent_app_number] => 8/390348 [patent_app_country] => US [patent_app_date] => 1995-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1452 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644540.pdf [firstpage_image] =>[orig_patent_app_number] => 390348 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3521556 [patent_doc_number] => 05563873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Multilayer optical disk and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/384459 [patent_app_country] => US [patent_app_date] => 1995-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 7823 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/563/05563873.pdf [firstpage_image] =>[orig_patent_app_number] => 384459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3572997 [patent_doc_number] => 05526319 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'Memory with adiabatically switched bit lines' [patent_app_type] => 1 [patent_app_number] => 8/381791 [patent_app_country] => US [patent_app_date] => 1995-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10099 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/526/05526319.pdf [firstpage_image] =>[orig_patent_app_number] => 381791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3669174 [patent_doc_number] => 05592417 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Non-volatile programmable bistable multivibrator, programmable by the source, for memory redundancy circuit' [patent_app_type] => 1 [patent_app_number] => 8/380738 [patent_app_country] => US [patent_app_date] => 1995-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3355 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592417.pdf [firstpage_image] =>[orig_patent_app_number] => 380738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3889737 [patent_doc_number] => 05825714 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Semiconductor memory device having noise killer circuit' [patent_app_type] => 1 [patent_app_number] => 8/379290 [patent_app_country] => US [patent_app_date] => 1995-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12362 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825714.pdf [firstpage_image] =>[orig_patent_app_number] => 379290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3560899 [patent_doc_number] => 05572475 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Sense amplifier control circuit of semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/379693 [patent_app_country] => US [patent_app_date] => 1995-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6511 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572475.pdf [firstpage_image] =>[orig_patent_app_number] => 379693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3527239 [patent_doc_number] => 05506815 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-09 [patent_title] => 'Reconfigurable multi-user buffer memory particularly for signal processing system' [patent_app_type] => 1 [patent_app_number] => 8/374991 [patent_app_country] => US [patent_app_date] => 1995-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3307 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/506/05506815.pdf [firstpage_image] =>[orig_patent_app_number] => 374991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3741366 [patent_doc_number] => 05636175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Row decoder/driver circuit for determining non selected wordlines and for driving non-selected wordlines to a potential less than the lowest potential of the digit lines' [patent_app_type] => 1 [patent_app_number] => 8/374264 [patent_app_country] => US [patent_app_date] => 1995-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5174 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/636/05636175.pdf [firstpage_image] =>[orig_patent_app_number] => 374264 [rel_patent_id] =>[rel_patent_doc_number] =>)