| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3451592
[patent_doc_number] => 05430685
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-04
[patent_title] => 'Multi-port random access memory device having memory cell rewritable through single input port'
[patent_app_type] => 1
[patent_app_number] => 8/270837
[patent_app_country] => US
[patent_app_date] => 1994-07-05
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 3989
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/430/05430685.pdf
[firstpage_image] =>[orig_patent_app_number] => 270837
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/270837 | Multi-port random access memory device having memory cell rewritable through single input port | Jul 4, 1994 | Issued |
Array
(
[id] => 3464238
[patent_doc_number] => 05452261
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-19
[patent_title] => 'Serial address generator for burst memory'
[patent_app_type] => 1
[patent_app_number] => 8/265535
[patent_app_country] => US
[patent_app_date] => 1994-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/452/05452261.pdf
[firstpage_image] =>[orig_patent_app_number] => 265535
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/265535 | Serial address generator for burst memory | Jun 23, 1994 | Issued |
Array
(
[id] => 3485423
[patent_doc_number] => 05432729
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-11
[patent_title] => 'Electronic module comprising a stack of IC chips each interacting with an IC chip secured to the stack'
[patent_app_type] => 1
[patent_app_number] => 8/255465
[patent_app_country] => US
[patent_app_date] => 1994-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 7922
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/432/05432729.pdf
[firstpage_image] =>[orig_patent_app_number] => 255465
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/255465 | Electronic module comprising a stack of IC chips each interacting with an IC chip secured to the stack | Jun 7, 1994 | Issued |
Array
(
[id] => 3437071
[patent_doc_number] => 05455791
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Method for erasing data in EEPROM devices on SOI substrates and device therefor'
[patent_app_type] => 1
[patent_app_number] => 8/252207
[patent_app_country] => US
[patent_app_date] => 1994-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1990
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/455/05455791.pdf
[firstpage_image] =>[orig_patent_app_number] => 252207
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/252207 | Method for erasing data in EEPROM devices on SOI substrates and device therefor | May 31, 1994 | Issued |
Array
(
[id] => 3114053
[patent_doc_number] => 05448511
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-05
[patent_title] => 'Memory stack with an integrated interconnect and mounting structure'
[patent_app_type] => 1
[patent_app_number] => 8/252609
[patent_app_country] => US
[patent_app_date] => 1994-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3575
[patent_no_of_claims] => 34
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/448/05448511.pdf
[firstpage_image] =>[orig_patent_app_number] => 252609
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/252609 | Memory stack with an integrated interconnect and mounting structure | May 31, 1994 | Issued |
Array
(
[id] => 3535007
[patent_doc_number] => 05504734
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-02
[patent_title] => 'Optical disc'
[patent_app_type] => 1
[patent_app_number] => 8/249970
[patent_app_country] => US
[patent_app_date] => 1994-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/504/05504734.pdf
[firstpage_image] =>[orig_patent_app_number] => 249970
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/249970 | Optical disc | May 26, 1994 | Issued |
| 08/249771 | MONITORING AND ADJUSTING LASER WRITE POWER IN AN OPTICAL DISK RECORDER USING PULSE-WIDTH MODULATED POWER LEVEL CHECKING SIGNALS | May 25, 1994 | Abandoned |
| 08/243585 | SEMICONDUCTOR MEMORY DEVICE | May 15, 1994 | Abandoned |
Array
(
[id] => 3915249
[patent_doc_number] => 05898619
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Memory cell having a plural transistor transmission gate and method of formation'
[patent_app_type] => 1
[patent_app_number] => 8/242993
[patent_app_country] => US
[patent_app_date] => 1994-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 14
[patent_no_of_words] => 5461
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/898/05898619.pdf
[firstpage_image] =>[orig_patent_app_number] => 242993
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/242993 | Memory cell having a plural transistor transmission gate and method of formation | May 15, 1994 | Issued |
Array
(
[id] => 3529905
[patent_doc_number] => 05530672
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Integrated circuit for operation with plural supply voltages'
[patent_app_type] => 1
[patent_app_number] => 8/239604
[patent_app_country] => US
[patent_app_date] => 1994-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3055
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530672.pdf
[firstpage_image] =>[orig_patent_app_number] => 239604
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/239604 | Integrated circuit for operation with plural supply voltages | May 8, 1994 | Issued |
Array
(
[id] => 3120487
[patent_doc_number] => 05465231
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-07
[patent_title] => 'EEPROM and logic LSI chip including such EEPROM'
[patent_app_type] => 1
[patent_app_number] => 8/239078
[patent_app_country] => US
[patent_app_date] => 1994-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4410
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/465/05465231.pdf
[firstpage_image] =>[orig_patent_app_number] => 239078
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/239078 | EEPROM and logic LSI chip including such EEPROM | May 5, 1994 | Issued |
Array
(
[id] => 3425211
[patent_doc_number] => 05453969
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-26
[patent_title] => 'Optical memory with pit depth encoding'
[patent_app_type] => 1
[patent_app_number] => 8/238756
[patent_app_country] => US
[patent_app_date] => 1994-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3403
[patent_no_of_claims] => 24
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[pdf_file] => patents/05/453/05453969.pdf
[firstpage_image] =>[orig_patent_app_number] => 238756
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/238756 | Optical memory with pit depth encoding | May 3, 1994 | Issued |
| 08/232852 | DEVICE COMPRISING MEANS FOR VALIDATING DATA WRITTEN IN A MEMORY | Apr 24, 1994 | Abandoned |
Array
(
[id] => 3135529
[patent_doc_number] => 05436863
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-25
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/232372
[patent_app_country] => US
[patent_app_date] => 1994-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_claims] => 6
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/436/05436863.pdf
[firstpage_image] =>[orig_patent_app_number] => 232372
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/232372 | Semiconductor memory device | Apr 24, 1994 | Issued |
Array
(
[id] => 3574221
[patent_doc_number] => 05483481
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-09
[patent_title] => 'Automatic wiring device for design of semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/231217
[patent_app_country] => US
[patent_app_date] => 1994-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/483/05483481.pdf
[firstpage_image] =>[orig_patent_app_number] => 231217
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/231217 | Automatic wiring device for design of semiconductor integrated circuit | Apr 21, 1994 | Issued |
Array
(
[id] => 3530609
[patent_doc_number] => 05490119
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Semiconductor device including signal generating circuit with level converting function and with reduced area of occupation'
[patent_app_type] => 1
[patent_app_number] => 8/229274
[patent_app_country] => US
[patent_app_date] => 1994-04-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/490/05490119.pdf
[firstpage_image] =>[orig_patent_app_number] => 229274
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/229274 | Semiconductor device including signal generating circuit with level converting function and with reduced area of occupation | Apr 17, 1994 | Issued |
Array
(
[id] => 3574437
[patent_doc_number] => 05483496
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-09
[patent_title] => 'Nonvolatile memory device having a timer circuit'
[patent_app_type] => 1
[patent_app_number] => 8/228968
[patent_app_country] => US
[patent_app_date] => 1994-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 1472
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[pdf_file] => patents/05/483/05483496.pdf
[firstpage_image] =>[orig_patent_app_number] => 228968
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/228968 | Nonvolatile memory device having a timer circuit | Apr 17, 1994 | Issued |
| 08/227139 | EFFICIENT ADDRESSING OF LARGE MEMORIES | Apr 12, 1994 | Abandoned |
Array
(
[id] => 3454174
[patent_doc_number] => 05388070
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-07
[patent_title] => 'Storage arrangement and method for operating the arrangement'
[patent_app_type] => 1
[patent_app_number] => 8/226227
[patent_app_country] => US
[patent_app_date] => 1994-04-11
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[pdf_file] => patents/05/388/05388070.pdf
[firstpage_image] =>[orig_patent_app_number] => 226227
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/226227 | Storage arrangement and method for operating the arrangement | Apr 10, 1994 | Issued |
Array
(
[id] => 3585051
[patent_doc_number] => 05523964
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'Ferroelectric non-volatile memory unit'
[patent_app_type] => 1
[patent_app_number] => 8/224241
[patent_app_country] => US
[patent_app_date] => 1994-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/05/523/05523964.pdf
[firstpage_image] =>[orig_patent_app_number] => 224241
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/224241 | Ferroelectric non-volatile memory unit | Apr 6, 1994 | Issued |