| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3438260
[patent_doc_number] => 05463590
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-31
[patent_title] => 'Multi-bank semiconductor memory device having common command detection'
[patent_app_type] => 1
[patent_app_number] => 8/210343
[patent_app_country] => US
[patent_app_date] => 1994-03-18
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[pdf_file] => patents/05/463/05463590.pdf
[firstpage_image] =>[orig_patent_app_number] => 210343
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/210343 | Multi-bank semiconductor memory device having common command detection | Mar 17, 1994 | Issued |
Array
(
[id] => 3433127
[patent_doc_number] => 05422859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-06
[patent_title] => 'Semiconductor memory system for monitoring a signal output, synchronization with data output from a memory device and indicating that the output data are valid, by using a CPU'
[patent_app_type] => 1
[patent_app_number] => 8/214773
[patent_app_country] => US
[patent_app_date] => 1994-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2108
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[pdf_file] => patents/05/422/05422859.pdf
[firstpage_image] =>[orig_patent_app_number] => 214773
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/214773 | Semiconductor memory system for monitoring a signal output, synchronization with data output from a memory device and indicating that the output data are valid, by using a CPU | Mar 15, 1994 | Issued |
Array
(
[id] => 3471978
[patent_doc_number] => 05469399
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-21
[patent_title] => 'Semiconductor memory, memory card, and method of driving power supply for EEPROM'
[patent_app_type] => 1
[patent_app_number] => 8/213058
[patent_app_country] => US
[patent_app_date] => 1994-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/469/05469399.pdf
[firstpage_image] =>[orig_patent_app_number] => 213058
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/213058 | Semiconductor memory, memory card, and method of driving power supply for EEPROM | Mar 14, 1994 | Issued |
Array
(
[id] => 3483462
[patent_doc_number] => 05428565
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-27
[patent_title] => 'Single stage sensing apparatus for a content addressable memory'
[patent_app_type] => 1
[patent_app_number] => 8/212350
[patent_app_country] => US
[patent_app_date] => 1994-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 5724
[patent_no_of_claims] => 11
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[patent_words_short_claim] => 362
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/428/05428565.pdf
[firstpage_image] =>[orig_patent_app_number] => 212350
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/212350 | Single stage sensing apparatus for a content addressable memory | Mar 10, 1994 | Issued |
| 08/208596 | SEMICONDUCTOR MEMORY DEVICE WITH RESISTIVE POWER SUPPLY CONNECTION | Mar 10, 1994 | Abandoned |
Array
(
[id] => 3432729
[patent_doc_number] => 05459692
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-17
[patent_title] => 'Semiconductor memory device and method for reading data therefrom'
[patent_app_type] => 1
[patent_app_number] => 8/199163
[patent_app_country] => US
[patent_app_date] => 1994-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4610
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[pdf_file] => patents/05/459/05459692.pdf
[firstpage_image] =>[orig_patent_app_number] => 199163
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/199163 | Semiconductor memory device and method for reading data therefrom | Feb 24, 1994 | Issued |
Array
(
[id] => 3435753
[patent_doc_number] => 05416745
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-16
[patent_title] => 'Parallel data transfer circuit'
[patent_app_type] => 1
[patent_app_number] => 8/200504
[patent_app_country] => US
[patent_app_date] => 1994-02-23
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[firstpage_image] =>[orig_patent_app_number] => 200504
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/200504 | Parallel data transfer circuit | Feb 22, 1994 | Issued |
Array
(
[id] => 3125729
[patent_doc_number] => 05410511
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-25
[patent_title] => 'Methods of controlling the erasing and writing of information in flash memory'
[patent_app_type] => 1
[patent_app_number] => 8/200497
[patent_app_country] => US
[patent_app_date] => 1994-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 4318
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/410/05410511.pdf
[firstpage_image] =>[orig_patent_app_number] => 200497
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/200497 | Methods of controlling the erasing and writing of information in flash memory | Feb 22, 1994 | Issued |
Array
(
[id] => 3418173
[patent_doc_number] => 05438545
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-01
[patent_title] => 'Data output buffer of semiconductor memory device for preventing noises'
[patent_app_type] => 1
[patent_app_number] => 8/200818
[patent_app_country] => US
[patent_app_date] => 1994-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2519
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/438/05438545.pdf
[firstpage_image] =>[orig_patent_app_number] => 200818
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/200818 | Data output buffer of semiconductor memory device for preventing noises | Feb 22, 1994 | Issued |
Array
(
[id] => 3117112
[patent_doc_number] => 05418750
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-23
[patent_title] => 'Semiconductor memory device for suppressing noises occurring on bit and word lines'
[patent_app_type] => 1
[patent_app_number] => 8/200107
[patent_app_country] => US
[patent_app_date] => 1994-02-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/418/05418750.pdf
[firstpage_image] =>[orig_patent_app_number] => 200107
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/200107 | Semiconductor memory device for suppressing noises occurring on bit and word lines | Feb 21, 1994 | Issued |
| 08/193138 | METHOD OF READING DATA AND READ-ONLY MEMORY CIRCUIT | Feb 13, 1994 | Abandoned |
Array
(
[id] => 3491490
[patent_doc_number] => 05406518
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-11
[patent_title] => 'Variable length delay circuit utilizing an integrated memory device with multiple-input and multiple-output configuration'
[patent_app_type] => 1
[patent_app_number] => 8/193247
[patent_app_country] => US
[patent_app_date] => 1994-02-08
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[pdf_file] => patents/05/406/05406518.pdf
[firstpage_image] =>[orig_patent_app_number] => 193247
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/193247 | Variable length delay circuit utilizing an integrated memory device with multiple-input and multiple-output configuration | Feb 7, 1994 | Issued |
Array
(
[id] => 3131023
[patent_doc_number] => 05384741
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-24
[patent_title] => 'Semiconductor memory device adapted for preventing a test mode operation from undesirably occurring'
[patent_app_type] => 1
[patent_app_number] => 8/186955
[patent_app_country] => US
[patent_app_date] => 1994-01-27
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[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/05/384/05384741.pdf
[firstpage_image] =>[orig_patent_app_number] => 186955
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/186955 | Semiconductor memory device adapted for preventing a test mode operation from undesirably occurring | Jan 26, 1994 | Issued |
Array
(
[id] => 3124625
[patent_doc_number] => 05396449
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-07
[patent_title] => 'Fast content addressable memory with reduced power consumption'
[patent_app_type] => 1
[patent_app_number] => 8/171483
[patent_app_country] => US
[patent_app_date] => 1993-12-21
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[pdf_file] => patents/05/396/05396449.pdf
[firstpage_image] =>[orig_patent_app_number] => 171483
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/171483 | Fast content addressable memory with reduced power consumption | Dec 20, 1993 | Issued |
Array
(
[id] => 3435715
[patent_doc_number] => 05416743
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-16
[patent_title] => 'Databus architecture for accelerated column access in RAM'
[patent_app_type] => 1
[patent_app_number] => 8/164703
[patent_app_country] => US
[patent_app_date] => 1993-12-10
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[pdf_file] => patents/05/416/05416743.pdf
[firstpage_image] =>[orig_patent_app_number] => 164703
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/164703 | Databus architecture for accelerated column access in RAM | Dec 9, 1993 | Issued |
Array
(
[id] => 3624133
[patent_doc_number] => 05511026
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-23
[patent_title] => 'Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories'
[patent_app_type] => 1
[patent_app_number] => 8/160578
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[pdf_file] => patents/05/511/05511026.pdf
[firstpage_image] =>[orig_patent_app_number] => 160578
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/160578 | Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories | Nov 30, 1993 | Issued |
Array
(
[id] => 3103866
[patent_doc_number] => 05369610
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-29
[patent_title] => 'Static memory with improved write-recovery'
[patent_app_type] => 1
[patent_app_number] => 8/157401
[patent_app_country] => US
[patent_app_date] => 1993-11-26
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[firstpage_image] =>[orig_patent_app_number] => 157401
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/157401 | Static memory with improved write-recovery | Nov 25, 1993 | Issued |
Array
(
[id] => 3418993
[patent_doc_number] => 05461585
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-24
[patent_title] => 'Semiconductor integrated circuit having delay circuit with voltage-to-delay characteristics proportional to power voltage level'
[patent_app_type] => 1
[patent_app_number] => 8/157296
[patent_app_country] => US
[patent_app_date] => 1993-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/05/461/05461585.pdf
[firstpage_image] =>[orig_patent_app_number] => 157296
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/157296 | Semiconductor integrated circuit having delay circuit with voltage-to-delay characteristics proportional to power voltage level | Nov 25, 1993 | Issued |
| 08/157398 | MULTILAYER OPTICAL DISK AND APPARATUS | Nov 25, 1993 | Abandoned |
Array
(
[id] => 3124917
[patent_doc_number] => 05396465
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-07
[patent_title] => 'Circuit for controlling isolation transistors in a semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/156779
[patent_app_country] => US
[patent_app_date] => 1993-11-24
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[firstpage_image] =>[orig_patent_app_number] => 156779
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/156779 | Circuit for controlling isolation transistors in a semiconductor memory device | Nov 23, 1993 | Issued |