| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3435484
[patent_doc_number] => 05404326
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-04
[patent_title] => 'Static random access memory cell structure having a thin film transistor load'
[patent_app_type] => 1
[patent_app_number] => 8/082380
[patent_app_country] => US
[patent_app_date] => 1993-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4886
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/404/05404326.pdf
[firstpage_image] =>[orig_patent_app_number] => 082380
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/082380 | Static random access memory cell structure having a thin film transistor load | Jun 27, 1993 | Issued |
Array
(
[id] => 3452204
[patent_doc_number] => 05467300
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'Grounded memory core for Roms, Eproms, and EEpproms having an address decoder, and sense amplifier'
[patent_app_type] => 1
[patent_app_number] => 8/084295
[patent_app_country] => US
[patent_app_date] => 1993-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 15218
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/467/05467300.pdf
[firstpage_image] =>[orig_patent_app_number] => 084295
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/084295 | Grounded memory core for Roms, Eproms, and EEpproms having an address decoder, and sense amplifier | Jun 27, 1993 | Issued |
Array
(
[id] => 3117055
[patent_doc_number] => 05408362
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Method for altering the coefficient of thermal expansion of a mirror'
[patent_app_type] => 1
[patent_app_number] => 8/080791
[patent_app_country] => US
[patent_app_date] => 1993-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3735
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/408/05408362.pdf
[firstpage_image] =>[orig_patent_app_number] => 080791
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/080791 | Method for altering the coefficient of thermal expansion of a mirror | Jun 21, 1993 | Issued |
Array
(
[id] => 2998921
[patent_doc_number] => 05367206
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-22
[patent_title] => 'Output buffer circuit for a low voltage EPROM'
[patent_app_type] => 1
[patent_app_number] => 8/078711
[patent_app_country] => US
[patent_app_date] => 1993-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2238
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/367/05367206.pdf
[firstpage_image] =>[orig_patent_app_number] => 078711
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/078711 | Output buffer circuit for a low voltage EPROM | Jun 16, 1993 | Issued |
| 08/075708 | STORAGE ARRANGEMENT AND METHOD FOR OPERATING THE ARRANGEMENT | Jun 10, 1993 | Pending |
Array
(
[id] => 3011431
[patent_doc_number] => 05359679
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-25
[patent_title] => 'Optical modulator'
[patent_app_type] => 1
[patent_app_number] => 8/072986
[patent_app_country] => US
[patent_app_date] => 1993-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2556
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/359/05359679.pdf
[firstpage_image] =>[orig_patent_app_number] => 072986
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/072986 | Optical modulator | Jun 3, 1993 | Issued |
| 08/069895 | ELECTRO-OPTIC MODULATOR HAVING GATED-DITHER BIAS CONTROL | May 31, 1993 | Pending |
| 08/068758 | METHOD AND APPARATUS FOR IMPLEMENTING REFRESH IN A SYNCHRONOUS DRAM SYSTEM | May 27, 1993 | Pending |
Array
(
[id] => 3082592
[patent_doc_number] => 05337285
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-09
[patent_title] => 'Method and apparatus for power control in devices'
[patent_app_type] => 1
[patent_app_number] => 8/065804
[patent_app_country] => US
[patent_app_date] => 1993-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2805
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/337/05337285.pdf
[firstpage_image] =>[orig_patent_app_number] => 065804
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/065804 | Method and apparatus for power control in devices | May 20, 1993 | Issued |
Array
(
[id] => 3504681
[patent_doc_number] => 05508955
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-16
[patent_title] => 'Electronically erasable-programmable memory cell having buried bit line'
[patent_app_type] => 1
[patent_app_number] => 8/064531
[patent_app_country] => US
[patent_app_date] => 1993-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3748
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/508/05508955.pdf
[firstpage_image] =>[orig_patent_app_number] => 064531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/064531 | Electronically erasable-programmable memory cell having buried bit line | May 19, 1993 | Issued |
Array
(
[id] => 3039633
[patent_doc_number] => 05349566
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-09-20
[patent_title] => 'Memory device with pulse circuit for timing data output, and method for outputting data'
[patent_app_type] => 1
[patent_app_number] => 8/064484
[patent_app_country] => US
[patent_app_date] => 1993-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5441
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/349/05349566.pdf
[firstpage_image] =>[orig_patent_app_number] => 064484
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/064484 | Memory device with pulse circuit for timing data output, and method for outputting data | May 18, 1993 | Issued |
Array
(
[id] => 3080180
[patent_doc_number] => 05361238
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-01
[patent_title] => 'Optical cache memory for magnetic and optical disk storage'
[patent_app_type] => 1
[patent_app_number] => 8/060602
[patent_app_country] => US
[patent_app_date] => 1993-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3918
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/361/05361238.pdf
[firstpage_image] =>[orig_patent_app_number] => 060602
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/060602 | Optical cache memory for magnetic and optical disk storage | May 11, 1993 | Issued |
Array
(
[id] => 3025487
[patent_doc_number] => 05341332
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-23
[patent_title] => 'Semiconductor memory device capable of flash writing and method of flash writing'
[patent_app_type] => 1
[patent_app_number] => 8/059406
[patent_app_country] => US
[patent_app_date] => 1993-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 6241
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/341/05341332.pdf
[firstpage_image] =>[orig_patent_app_number] => 059406
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/059406 | Semiconductor memory device capable of flash writing and method of flash writing | May 10, 1993 | Issued |
Array
(
[id] => 3080011
[patent_doc_number] => 05361228
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-01
[patent_title] => 'IC memory card system having a common data and address bus'
[patent_app_type] => 1
[patent_app_number] => 8/054575
[patent_app_country] => US
[patent_app_date] => 1993-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 11034
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/361/05361228.pdf
[firstpage_image] =>[orig_patent_app_number] => 054575
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/054575 | IC memory card system having a common data and address bus | Apr 29, 1993 | Issued |
Array
(
[id] => 3082084
[patent_doc_number] => 05365365
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-15
[patent_title] => 'Electrochromic system with measurement of charge to be transferred'
[patent_app_type] => 1
[patent_app_number] => 8/053652
[patent_app_country] => US
[patent_app_date] => 1993-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4697
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/365/05365365.pdf
[firstpage_image] =>[orig_patent_app_number] => 053652
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/053652 | Electrochromic system with measurement of charge to be transferred | Apr 28, 1993 | Issued |
Array
(
[id] => 3059917
[patent_doc_number] => 05305267
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-19
[patent_title] => 'Semiconductor memory device adapted for preventing a test mode operation from undesirably occurring'
[patent_app_type] => 1
[patent_app_number] => 8/051405
[patent_app_country] => US
[patent_app_date] => 1993-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 6093
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/305/05305267.pdf
[firstpage_image] =>[orig_patent_app_number] => 051405
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/051405 | Semiconductor memory device adapted for preventing a test mode operation from undesirably occurring | Apr 22, 1993 | Issued |
| 08/052475 | ELECTRONIC MODULE COMPRISING A STACK OF IC CHIPS EACH INTERACTING WITH AN IC CHIP SECURED TO THE STACK FACE | Apr 22, 1993 | Pending |
Array
(
[id] => 3108030
[patent_doc_number] => 05315368
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-24
[patent_title] => 'Optical sight enhancing blade arrangement'
[patent_app_type] => 1
[patent_app_number] => 8/044761
[patent_app_country] => US
[patent_app_date] => 1993-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 1798
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 308
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/315/05315368.pdf
[firstpage_image] =>[orig_patent_app_number] => 044761
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/044761 | Optical sight enhancing blade arrangement | Apr 11, 1993 | Issued |
Array
(
[id] => 3425601
[patent_doc_number] => 05394372
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-28
[patent_title] => 'Semiconductor memory device having charge-pump system with improved oscillation means'
[patent_app_type] => 1
[patent_app_number] => 8/037585
[patent_app_country] => US
[patent_app_date] => 1993-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 4307
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/394/05394372.pdf
[firstpage_image] =>[orig_patent_app_number] => 037585
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/037585 | Semiconductor memory device having charge-pump system with improved oscillation means | Mar 25, 1993 | Issued |
Array
(
[id] => 3046426
[patent_doc_number] => 05373470
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-13
[patent_title] => 'Method and circuit for configuring I/O devices'
[patent_app_type] => 1
[patent_app_number] => 8/037818
[patent_app_country] => US
[patent_app_date] => 1993-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6381
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/373/05373470.pdf
[firstpage_image] =>[orig_patent_app_number] => 037818
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/037818 | Method and circuit for configuring I/O devices | Mar 25, 1993 | Issued |