Son Luu Mai

Array ( [id] => 3075338 [patent_doc_number] => 05295107 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-15 [patent_title] => 'Method of erasing data stored in flash type nonvolatile memory cell' [patent_app_type] => 1 [patent_app_number] => 8/024074 [patent_app_country] => US [patent_app_date] => 1993-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4703 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/295/05295107.pdf [firstpage_image] =>[orig_patent_app_number] => 024074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3086225 [patent_doc_number] => 05323358 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-21 [patent_title] => 'Clock-synchronous semiconductor memory device and method for accessing the device' [patent_app_type] => 1 [patent_app_number] => 8/024354 [patent_app_country] => US [patent_app_date] => 1993-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6608 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/323/05323358.pdf [firstpage_image] =>[orig_patent_app_number] => 024354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3041073 [patent_doc_number] => 05343422 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-30 [patent_title] => 'Nonvolatile magnetoresistive storage device using spin valve effect' [patent_app_type] => 1 [patent_app_number] => 8/021413 [patent_app_country] => US [patent_app_date] => 1993-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2330 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/343/05343422.pdf [firstpage_image] =>[orig_patent_app_number] => 021413 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3047408 [patent_doc_number] => 05377032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Electro-optic light shutter and frame assembly with integrated switching mechanism' [patent_app_type] => 1 [patent_app_number] => 8/013966 [patent_app_country] => US [patent_app_date] => 1993-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 5514 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/377/05377032.pdf [firstpage_image] =>[orig_patent_app_number] => 013966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3084443 [patent_doc_number] => 05323263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-21 [patent_title] => 'Off-axis catadioptric projection system' [patent_app_type] => 1 [patent_app_number] => 8/012105 [patent_app_country] => US [patent_app_date] => 1993-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3168 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/323/05323263.pdf [firstpage_image] =>[orig_patent_app_number] => 012105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3082387 [patent_doc_number] => 05337274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-09 [patent_title] => 'Nonvolatile semiconductor memory device having adjacent memory cells and peripheral transistors separated by field oxide' [patent_app_type] => 1 [patent_app_number] => 8/004525 [patent_app_country] => US [patent_app_date] => 1993-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2523 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/337/05337274.pdf [firstpage_image] =>[orig_patent_app_number] => 004525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3006499 [patent_doc_number] => 05363326 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-08 [patent_title] => 'Semiconductor memory device having crossed word lines, and method of operating same' [patent_app_type] => 1 [patent_app_number] => 8/003595 [patent_app_country] => US [patent_app_date] => 1993-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2774 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/363/05363326.pdf [firstpage_image] =>[orig_patent_app_number] => 003595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3059624 [patent_doc_number] => 05287527 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Logical signal output drivers for integrated circuit interconnection' [patent_app_type] => 1 [patent_app_number] => 7/997380 [patent_app_country] => US [patent_app_date] => 1992-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2365 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287527.pdf [firstpage_image] =>[orig_patent_app_number] => 997380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3032254 [patent_doc_number] => 05327384 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-05 [patent_title] => 'Flash memory' [patent_app_type] => 1 [patent_app_number] => 7/997230 [patent_app_country] => US [patent_app_date] => 1992-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3333 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/327/05327384.pdf [firstpage_image] =>[orig_patent_app_number] => 997230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3066883 [patent_doc_number] => 05351217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-27 [patent_title] => 'Word line voltage supply circuit' [patent_app_type] => 1 [patent_app_number] => 7/996304 [patent_app_country] => US [patent_app_date] => 1992-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2536 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/351/05351217.pdf [firstpage_image] =>[orig_patent_app_number] => 996304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3019329 [patent_doc_number] => 05331598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-19 [patent_title] => 'Memory control device' [patent_app_type] => 1 [patent_app_number] => 7/987159 [patent_app_country] => US [patent_app_date] => 1992-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8236 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/331/05331598.pdf [firstpage_image] =>[orig_patent_app_number] => 987159 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3103798 [patent_doc_number] => 05313436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Address transition detecting circuit' [patent_app_type] => 1 [patent_app_number] => 7/986693 [patent_app_country] => US [patent_app_date] => 1992-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4228 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313436.pdf [firstpage_image] =>[orig_patent_app_number] => 986693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3103602 [patent_doc_number] => 05313426 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/986998 [patent_app_country] => US [patent_app_date] => 1992-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8921 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313426.pdf [firstpage_image] =>[orig_patent_app_number] => 986998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3101533 [patent_doc_number] => 05319253 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-07 [patent_title] => 'Data retention mode control circuit' [patent_app_type] => 1 [patent_app_number] => 7/985808 [patent_app_country] => US [patent_app_date] => 1992-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2545 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/319/05319253.pdf [firstpage_image] =>[orig_patent_app_number] => 985808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3024687 [patent_doc_number] => 05309401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-03 [patent_title] => 'Static memory device' [patent_app_type] => 1 [patent_app_number] => 7/979623 [patent_app_country] => US [patent_app_date] => 1992-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3569 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/309/05309401.pdf [firstpage_image] =>[orig_patent_app_number] => 979623 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3076752 [patent_doc_number] => 05311479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-10 [patent_title] => 'Semiconductor memory device having a CMOS decoding circuit' [patent_app_type] => 1 [patent_app_number] => 7/931975 [patent_app_country] => US [patent_app_date] => 1992-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3792 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/311/05311479.pdf [firstpage_image] =>[orig_patent_app_number] => 931975 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3075201 [patent_doc_number] => 05295100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-15 [patent_title] => 'Method for providing a faster ones voltage level restore operation in a DRAM' [patent_app_type] => 1 [patent_app_number] => 7/931095 [patent_app_country] => US [patent_app_date] => 1992-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2113 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/295/05295100.pdf [firstpage_image] =>[orig_patent_app_number] => 931095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3059862 [patent_doc_number] => 05305264 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-19 [patent_title] => 'Static type random access memory device equipped with variable load circuits for digit line pairs' [patent_app_type] => 1 [patent_app_number] => 7/929126 [patent_app_country] => US [patent_app_date] => 1992-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8887 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/305/05305264.pdf [firstpage_image] =>[orig_patent_app_number] => 929126 [rel_patent_id] =>[rel_patent_doc_number] =>)