
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3103798
[patent_doc_number] => 05313436
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'Address transition detecting circuit'
[patent_app_type] => 1
[patent_app_number] => 7/986693
[patent_app_country] => US
[patent_app_date] => 1992-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4228
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/313/05313436.pdf
[firstpage_image] =>[orig_patent_app_number] => 986693
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/986693 | Address transition detecting circuit | Dec 7, 1992 | Issued |
Array
(
[id] => 3019329
[patent_doc_number] => 05331598
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-07-19
[patent_title] => 'Memory control device'
[patent_app_type] => 1
[patent_app_number] => 7/987159
[patent_app_country] => US
[patent_app_date] => 1992-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8236
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/331/05331598.pdf
[firstpage_image] =>[orig_patent_app_number] => 987159
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/987159 | Memory control device | Dec 7, 1992 | Issued |
Array
(
[id] => 3103602
[patent_doc_number] => 05313426
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/986998
[patent_app_country] => US
[patent_app_date] => 1992-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 8921
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 307
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/313/05313426.pdf
[firstpage_image] =>[orig_patent_app_number] => 986998
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/986998 | Semiconductor memory device | Dec 6, 1992 | Issued |
Array
(
[id] => 3101533
[patent_doc_number] => 05319253
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-07
[patent_title] => 'Data retention mode control circuit'
[patent_app_type] => 1
[patent_app_number] => 7/985808
[patent_app_country] => US
[patent_app_date] => 1992-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2545
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/319/05319253.pdf
[firstpage_image] =>[orig_patent_app_number] => 985808
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/985808 | Data retention mode control circuit | Dec 1, 1992 | Issued |
Array
(
[id] => 3024687
[patent_doc_number] => 05309401
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-03
[patent_title] => 'Static memory device'
[patent_app_type] => 1
[patent_app_number] => 7/979623
[patent_app_country] => US
[patent_app_date] => 1992-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3569
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/309/05309401.pdf
[firstpage_image] =>[orig_patent_app_number] => 979623
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/979623 | Static memory device | Nov 18, 1992 | Issued |
Array
(
[id] => 3076752
[patent_doc_number] => 05311479
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-10
[patent_title] => 'Semiconductor memory device having a CMOS decoding circuit'
[patent_app_type] => 1
[patent_app_number] => 7/931975
[patent_app_country] => US
[patent_app_date] => 1992-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3792
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/311/05311479.pdf
[firstpage_image] =>[orig_patent_app_number] => 931975
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/931975 | Semiconductor memory device having a CMOS decoding circuit | Aug 18, 1992 | Issued |
Array
(
[id] => 3075201
[patent_doc_number] => 05295100
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-15
[patent_title] => 'Method for providing a faster ones voltage level restore operation in a DRAM'
[patent_app_type] => 1
[patent_app_number] => 7/931095
[patent_app_country] => US
[patent_app_date] => 1992-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2113
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/295/05295100.pdf
[firstpage_image] =>[orig_patent_app_number] => 931095
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/931095 | Method for providing a faster ones voltage level restore operation in a DRAM | Aug 13, 1992 | Issued |
Array
(
[id] => 2973283
[patent_doc_number] => 05274591
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-28
[patent_title] => 'Serial clock noise immunity in a semiconductor memory integrated circuit having a serial port'
[patent_app_type] => 1
[patent_app_number] => 7/929784
[patent_app_country] => US
[patent_app_date] => 1992-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 4374
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/274/05274591.pdf
[firstpage_image] =>[orig_patent_app_number] => 929784
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/929784 | Serial clock noise immunity in a semiconductor memory integrated circuit having a serial port | Aug 12, 1992 | Issued |
Array
(
[id] => 3059862
[patent_doc_number] => 05305264
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-19
[patent_title] => 'Static type random access memory device equipped with variable load circuits for digit line pairs'
[patent_app_type] => 1
[patent_app_number] => 7/929126
[patent_app_country] => US
[patent_app_date] => 1992-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 8887
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 292
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/305/05305264.pdf
[firstpage_image] =>[orig_patent_app_number] => 929126
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/929126 | Static type random access memory device equipped with variable load circuits for digit line pairs | Aug 12, 1992 | Issued |
Array
(
[id] => 3064301
[patent_doc_number] => 05345416
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-09-06
[patent_title] => 'High density nonvolatile memory and decoder of the same'
[patent_app_type] => 1
[patent_app_number] => 7/928442
[patent_app_country] => US
[patent_app_date] => 1992-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 11095
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/345/05345416.pdf
[firstpage_image] =>[orig_patent_app_number] => 928442
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/928442 | High density nonvolatile memory and decoder of the same | Aug 11, 1992 | Issued |
Array
(
[id] => 2967890
[patent_doc_number] => 05264737
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'One-shot signal generation circuitry for use in semiconductor memory integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/925121
[patent_app_country] => US
[patent_app_date] => 1992-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2693
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/264/05264737.pdf
[firstpage_image] =>[orig_patent_app_number] => 925121
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/925121 | One-shot signal generation circuitry for use in semiconductor memory integrated circuit | Aug 5, 1992 | Issued |
| 07/926224 | OPTICAL MEMORY | Aug 4, 1992 | Abandoned |
Array
(
[id] => 3075146
[patent_doc_number] => 05295097
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-15
[patent_title] => 'Nonvolatile random access memory'
[patent_app_type] => 1
[patent_app_number] => 7/925986
[patent_app_country] => US
[patent_app_date] => 1992-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2847
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/295/05295097.pdf
[firstpage_image] =>[orig_patent_app_number] => 925986
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/925986 | Nonvolatile random access memory | Aug 4, 1992 | Issued |
Array
(
[id] => 3002764
[patent_doc_number] => 05367406
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-22
[patent_title] => 'Optical device with inherent focusing error correction'
[patent_app_type] => 1
[patent_app_number] => 7/913344
[patent_app_country] => US
[patent_app_date] => 1992-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 4420
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/367/05367406.pdf
[firstpage_image] =>[orig_patent_app_number] => 913344
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/913344 | Optical device with inherent focusing error correction | Jul 14, 1992 | Issued |
Array
(
[id] => 3032250
[patent_doc_number] => 05289411
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-22
[patent_title] => 'Floating gate memory array device having improved immunity to write disturbance'
[patent_app_type] => 1
[patent_app_number] => 7/851080
[patent_app_country] => US
[patent_app_date] => 1992-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3462
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/289/05289411.pdf
[firstpage_image] =>[orig_patent_app_number] => 851080
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/851080 | Floating gate memory array device having improved immunity to write disturbance | Mar 12, 1992 | Issued |