Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11339373 [patent_doc_number] => 20160365130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'Current-Mode Sense Amplifier' [patent_app_type] => utility [patent_app_number] => 15/245668 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7807 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245668
Current-mode sense amplifier Aug 23, 2016 Issued
Array ( [id] => 13363313 [patent_doc_number] => 20180233196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => SINGLE-READOUT HIGH-DENSITY MEMRISTOR CROSSBAR [patent_app_type] => utility [patent_app_number] => 15/751650 [patent_app_country] => US [patent_app_date] => 2016-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15751650 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/751650
Single-readout high-density memristor crossbar Aug 22, 2016 Issued
Array ( [id] => 11453021 [patent_doc_number] => 09576670 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Method and system for managing a writing cycle of a data in a EEPROM memory cell' [patent_app_type] => utility [patent_app_number] => 15/244521 [patent_app_country] => US [patent_app_date] => 2016-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3533 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15244521 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/244521
Method and system for managing a writing cycle of a data in a EEPROM memory cell Aug 22, 2016 Issued
Array ( [id] => 12935257 [patent_doc_number] => 09830971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Memory controller with clock-to-strobe skew compensation [patent_app_type] => utility [patent_app_number] => 15/242425 [patent_app_country] => US [patent_app_date] => 2016-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15242425 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/242425
Memory controller with clock-to-strobe skew compensation Aug 18, 2016 Issued
Array ( [id] => 11315165 [patent_doc_number] => 20160351275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'DETERMINING SOFT DATA FROM A HARD READ' [patent_app_type] => utility [patent_app_number] => 15/231349 [patent_app_country] => US [patent_app_date] => 2016-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14099 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15231349 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/231349
Determining soft data from a hard read Aug 7, 2016 Issued
Array ( [id] => 11125132 [patent_doc_number] => 20160322106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'IN-MEMORY COMPUTATIONAL DEVICE' [patent_app_type] => utility [patent_app_number] => 15/206278 [patent_app_country] => US [patent_app_date] => 2016-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4553 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15206278 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/206278
In-memory computational device Jul 9, 2016 Issued
Array ( [id] => 11117860 [patent_doc_number] => 20160314834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'Rewritable Multibit Non-Volatile Memory With Soft Decode Optimization' [patent_app_type] => utility [patent_app_number] => 15/204265 [patent_app_country] => US [patent_app_date] => 2016-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 18806 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15204265 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/204265
Rewritable multibit non-volatile memory with soft decode optimization Jul 6, 2016 Issued
Array ( [id] => 11117858 [patent_doc_number] => 20160314832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'Circuits and Methods for Performance Optimization of SRAM Memory' [patent_app_type] => utility [patent_app_number] => 15/199167 [patent_app_country] => US [patent_app_date] => 2016-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8738 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15199167 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/199167
Circuits and methods for performance optimization of SRAM memory Jun 29, 2016 Issued
Array ( [id] => 11087452 [patent_doc_number] => 20160284419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/176269 [patent_app_country] => US [patent_app_date] => 2016-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 16587 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15176269 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/176269
Nonvolatile memory devices, operating methods thereof and memory systems including the same Jun 7, 2016 Issued
Array ( [id] => 11431837 [patent_doc_number] => 09570158 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-14 [patent_title] => 'Output latch for accelerated memory access' [patent_app_type] => utility [patent_app_number] => 15/146070 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12383 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146070 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/146070
Output latch for accelerated memory access May 3, 2016 Issued
Array ( [id] => 11701540 [patent_doc_number] => 09691463 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-27 [patent_title] => 'Spin hall effect MRAM with self-reference read' [patent_app_type] => utility [patent_app_number] => 15/145364 [patent_app_country] => US [patent_app_date] => 2016-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 5663 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15145364 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/145364
Spin hall effect MRAM with self-reference read May 2, 2016 Issued
Array ( [id] => 11831483 [patent_doc_number] => 09728231 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-08 [patent_title] => 'Device and method for data-writing' [patent_app_type] => utility [patent_app_number] => 15/145658 [patent_app_country] => US [patent_app_date] => 2016-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15145658 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/145658
Device and method for data-writing May 2, 2016 Issued
Array ( [id] => 11644894 [patent_doc_number] => 09666282 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-30 [patent_title] => 'Program inhibiting in memory devices' [patent_app_type] => utility [patent_app_number] => 15/145204 [patent_app_country] => US [patent_app_date] => 2016-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11434 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15145204 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/145204
Program inhibiting in memory devices May 2, 2016 Issued
Array ( [id] => 11599505 [patent_doc_number] => 09646681 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-09 [patent_title] => 'Memory cell with improved write margin' [patent_app_type] => utility [patent_app_number] => 15/137952 [patent_app_country] => US [patent_app_date] => 2016-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7300 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15137952 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/137952
Memory cell with improved write margin Apr 24, 2016 Issued
Array ( [id] => 11489247 [patent_doc_number] => 09595319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Partial/full array/block erase for 2D/3D hierarchical NAND' [patent_app_type] => utility [patent_app_number] => 15/137284 [patent_app_country] => US [patent_app_date] => 2016-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 25584 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15137284 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/137284
Partial/full array/block erase for 2D/3D hierarchical NAND Apr 24, 2016 Issued
Array ( [id] => 11117865 [patent_doc_number] => 20160314839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'Dual Function Hybrid Memory Cell' [patent_app_type] => utility [patent_app_number] => 15/136838 [patent_app_country] => US [patent_app_date] => 2016-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15136838 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/136838
Dual function hybrid memory cell Apr 21, 2016 Issued
Array ( [id] => 11036025 [patent_doc_number] => 20160232981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/130237 [patent_app_country] => US [patent_app_date] => 2016-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 16980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15130237 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/130237
Nonvolatile memory device and method of operating the same Apr 14, 2016 Issued
Array ( [id] => 12375093 [patent_doc_number] => 09959923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-01 [patent_title] => Apparatuses and methods to reverse data stored in memory [patent_app_type] => utility [patent_app_number] => 15/098707 [patent_app_country] => US [patent_app_date] => 2016-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10617 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15098707 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/098707
Apparatuses and methods to reverse data stored in memory Apr 13, 2016 Issued
Array ( [id] => 11932397 [patent_doc_number] => 09799398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Memory cell verification circuits, memory cell sense circuits and memory cell verification methods' [patent_app_type] => utility [patent_app_number] => 15/096135 [patent_app_country] => US [patent_app_date] => 2016-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6771 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15096135 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/096135
Memory cell verification circuits, memory cell sense circuits and memory cell verification methods Apr 10, 2016 Issued
Array ( [id] => 11353456 [patent_doc_number] => 20160372196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'WRITING METHOD FOR RESISTIVE MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/088138 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5254 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088138 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088138
Writing method for resistive memory apparatus Mar 31, 2016 Issued
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