
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14366433
[patent_doc_number] => 10304528
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-28
[patent_title] => Memory device, memory system, and memory control method
[patent_app_type] => utility
[patent_app_number] => 15/567446
[patent_app_country] => US
[patent_app_date] => 2016-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 37
[patent_no_of_words] => 22444
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 328
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15567446
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/567446 | Memory device, memory system, and memory control method | Mar 28, 2016 | Issued |
Array
(
[id] => 11524286
[patent_doc_number] => 09607695
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-03-28
[patent_title] => 'Multi-bit non-volatile random-access memory cells'
[patent_app_type] => utility
[patent_app_number] => 15/079462
[patent_app_country] => US
[patent_app_date] => 2016-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4972
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15079462
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/079462 | Multi-bit non-volatile random-access memory cells | Mar 23, 2016 | Issued |
Array
(
[id] => 12214674
[patent_doc_number] => 09911489
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-06
[patent_title] => 'Memory cells, memory systems, and memory programming methods'
[patent_app_type] => utility
[patent_app_number] => 15/076451
[patent_app_country] => US
[patent_app_date] => 2016-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 7543
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076451
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/076451 | Memory cells, memory systems, and memory programming methods | Mar 20, 2016 | Issued |
Array
(
[id] => 11539258
[patent_doc_number] => 09613670
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-04
[patent_title] => 'Memory systems and methods involving high speed local address circuitry'
[patent_app_type] => utility
[patent_app_number] => 15/068075
[patent_app_country] => US
[patent_app_date] => 2016-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3893
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15068075
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/068075 | Memory systems and methods involving high speed local address circuitry | Mar 10, 2016 | Issued |
Array
(
[id] => 10992832
[patent_doc_number] => 20160189778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-30
[patent_title] => 'TECHNIQUES FOR PROGRAMMING OF SELECT GATES IN NAND MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/062987
[patent_app_country] => US
[patent_app_date] => 2016-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 8604
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062987
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/062987 | Techniques for programming of select gates in NAND memory | Mar 6, 2016 | Issued |
Array
(
[id] => 11861712
[patent_doc_number] => 09741399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Data shift by elements of a vector in memory'
[patent_app_type] => utility
[patent_app_number] => 15/060222
[patent_app_country] => US
[patent_app_date] => 2016-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 34333
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060222
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060222 | Data shift by elements of a vector in memory | Mar 2, 2016 | Issued |
Array
(
[id] => 11861712
[patent_doc_number] => 09741399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Data shift by elements of a vector in memory'
[patent_app_type] => utility
[patent_app_number] => 15/060222
[patent_app_country] => US
[patent_app_date] => 2016-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 34333
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060222
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060222 | Data shift by elements of a vector in memory | Mar 2, 2016 | Issued |
Array
(
[id] => 11861712
[patent_doc_number] => 09741399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Data shift by elements of a vector in memory'
[patent_app_type] => utility
[patent_app_number] => 15/060222
[patent_app_country] => US
[patent_app_date] => 2016-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 34333
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060222
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060222 | Data shift by elements of a vector in memory | Mar 2, 2016 | Issued |
Array
(
[id] => 11861712
[patent_doc_number] => 09741399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Data shift by elements of a vector in memory'
[patent_app_type] => utility
[patent_app_number] => 15/060222
[patent_app_country] => US
[patent_app_date] => 2016-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 34333
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060222
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060222 | Data shift by elements of a vector in memory | Mar 2, 2016 | Issued |
Array
(
[id] => 11339398
[patent_doc_number] => 20160365154
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-15
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/060464
[patent_app_country] => US
[patent_app_date] => 2016-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 16196
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060464
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060464 | SEMICONDUCTOR MEMORY DEVICE | Mar 2, 2016 | Abandoned |
Array
(
[id] => 11739992
[patent_doc_number] => 09704584
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-11
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 15/060460
[patent_app_country] => US
[patent_app_date] => 2016-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 15054
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060460
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060460 | Semiconductor memory device | Mar 2, 2016 | Issued |
Array
(
[id] => 11615279
[patent_doc_number] => 09653140
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-16
[patent_title] => 'Memory device and system including the same'
[patent_app_type] => utility
[patent_app_number] => 15/058332
[patent_app_country] => US
[patent_app_date] => 2016-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4276
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058332
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/058332 | Memory device and system including the same | Mar 1, 2016 | Issued |
Array
(
[id] => 11495193
[patent_doc_number] => 20170069379
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-09
[patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND DRIVING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/057318
[patent_app_country] => US
[patent_app_date] => 2016-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9499
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15057318
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/057318 | Semiconductor storage device and driving method thereof | Feb 29, 2016 | Issued |
Array
(
[id] => 11366909
[patent_doc_number] => 20170004890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-05
[patent_title] => 'SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/056390
[patent_app_country] => US
[patent_app_date] => 2016-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 7622
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15056390
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/056390 | Semiconductor device and operating method thereof | Feb 28, 2016 | Issued |
Array
(
[id] => 11422633
[patent_doc_number] => 20170030777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-02
[patent_title] => 'SEMICONDUCTOR DEVICE THAT WRITES TEMPERATURE DATA FOR SUBSEQUENT DATA READING'
[patent_app_type] => utility
[patent_app_number] => 15/056612
[patent_app_country] => US
[patent_app_date] => 2016-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5978
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15056612
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/056612 | SEMICONDUCTOR DEVICE THAT WRITES TEMPERATURE DATA FOR SUBSEQUENT DATA READING | Feb 28, 2016 | Abandoned |
Array
(
[id] => 11353459
[patent_doc_number] => 20160372199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, MEMORY SYSTEM INCLUDING THE NON-VOLATILE MEMORY DEVICE, AND OPERATING METHOD OF THE MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/055747
[patent_app_country] => US
[patent_app_date] => 2016-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 16469
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055747
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/055747 | Non-volatile memory device, operating method thereof, memory system including the non-volatile memory device, and operating method of the memory system | Feb 28, 2016 | Issued |
Array
(
[id] => 11539268
[patent_doc_number] => 09613681
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-04
[patent_title] => 'Voltage generation circuit'
[patent_app_type] => utility
[patent_app_number] => 15/056600
[patent_app_country] => US
[patent_app_date] => 2016-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5897
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15056600
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/056600 | Voltage generation circuit | Feb 28, 2016 | Issued |
Array
(
[id] => 11321427
[patent_doc_number] => 09520173
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-13
[patent_title] => 'Magnetic random access memory (MRAM) and method of operation'
[patent_app_type] => utility
[patent_app_number] => 15/057004
[patent_app_country] => US
[patent_app_date] => 2016-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 7226
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15057004
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/057004 | Magnetic random access memory (MRAM) and method of operation | Feb 28, 2016 | Issued |
Array
(
[id] => 11227308
[patent_doc_number] => 09455034
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-09-27
[patent_title] => 'Method and system for managing a writing cycle of a data in a EEPROM memory cell'
[patent_app_type] => utility
[patent_app_number] => 15/055552
[patent_app_country] => US
[patent_app_date] => 2016-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3514
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055552
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/055552 | Method and system for managing a writing cycle of a data in a EEPROM memory cell | Feb 26, 2016 | Issued |
Array
(
[id] => 15093163
[patent_doc_number] => 20190341393
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-07
[patent_title] => High Reliability OTP Memory by Using of Voltage Isolation in Series
[patent_app_type] => utility
[patent_app_number] => 16/075982
[patent_app_country] => US
[patent_app_date] => 2016-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1942
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16075982
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/075982 | High reliability OTP memory by using of voltage isolation in series | Feb 17, 2016 | Issued |