Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10463611 [patent_doc_number] => 20150348625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'RESISTANCE CHANGE TYPE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/825844 [patent_app_country] => US [patent_app_date] => 2015-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14109 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14825844 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/825844
Resistance change type memory Aug 12, 2015 Issued
Array ( [id] => 11644871 [patent_doc_number] => 09666258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Bit line clamp voltage generator for STT MRAM sensing' [patent_app_type] => utility [patent_app_number] => 14/823828 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4321 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823828 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/823828
Bit line clamp voltage generator for STT MRAM sensing Aug 10, 2015 Issued
Array ( [id] => 10463622 [patent_doc_number] => 20150348637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/820895 [patent_app_country] => US [patent_app_date] => 2015-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 61 [patent_no_of_words] => 27257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14820895 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/820895
Nonvolatile memory devices, operating methods thereof and memory systems including the same Aug 6, 2015 Issued
Array ( [id] => 11346081 [patent_doc_number] => 09530495 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Resistive switching memory having a resistor, diode, and switch memory cell' [patent_app_type] => utility [patent_app_number] => 14/819014 [patent_app_country] => US [patent_app_date] => 2015-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14819014 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/819014
Resistive switching memory having a resistor, diode, and switch memory cell Aug 4, 2015 Issued
Array ( [id] => 10440275 [patent_doc_number] => 20150325287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'MEMORY ARRAY AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/805694 [patent_app_country] => US [patent_app_date] => 2015-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14805694 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/805694
Memory array and method of operating the same Jul 21, 2015 Issued
Array ( [id] => 11279554 [patent_doc_number] => 09496035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Devices and methods to program a memory cell' [patent_app_type] => utility [patent_app_number] => 14/804122 [patent_app_country] => US [patent_app_date] => 2015-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14804122 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/804122
Devices and methods to program a memory cell Jul 19, 2015 Issued
Array ( [id] => 11253224 [patent_doc_number] => 09478740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Switching device structures and methods' [patent_app_type] => utility [patent_app_number] => 14/792778 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4348 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792778 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/792778
Switching device structures and methods Jul 6, 2015 Issued
Array ( [id] => 10402449 [patent_doc_number] => 20150287457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'APPARATUSES AND METHODS INCLUDING SUPPLY CURRENT IN MEMORY' [patent_app_type] => utility [patent_app_number] => 14/746460 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11849 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746460 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/746460
Apparatuses and methods including supply current in memory Jun 21, 2015 Issued
Array ( [id] => 10377620 [patent_doc_number] => 20150262628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'METHOD OF DYNAMICALLY SELECTING MEMORY CELL CAPACITY' [patent_app_type] => utility [patent_app_number] => 14/728900 [patent_app_country] => US [patent_app_date] => 2015-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7760 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14728900 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/728900
Method of dynamically selecting memory cell capacity Jun 1, 2015 Issued
Array ( [id] => 11746430 [patent_doc_number] => 20170200503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'STORAGE APPARATUS, FLASH MEMORY CONTROL APPARATUS, AND PROGRAM' [patent_app_type] => utility [patent_app_number] => 15/314573 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8066 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15314573 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/314573
Storage apparatus, flash memory control apparatus, and program May 28, 2015 Issued
Array ( [id] => 10764987 [patent_doc_number] => 20160111142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'MEMORY WITH BIT LINE CONTROL' [patent_app_type] => utility [patent_app_number] => 14/713648 [patent_app_country] => US [patent_app_date] => 2015-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14713648 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/713648
Memory with bit line control May 14, 2015 Issued
Array ( [id] => 10659350 [patent_doc_number] => 20160005494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'E-FUSE TEST DEVICE AND SEMICONDUCTOR DEVICE INCLUDING\nTHE SAME' [patent_app_type] => utility [patent_app_number] => 14/713458 [patent_app_country] => US [patent_app_date] => 2015-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14713458 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/713458
E-fuse test device and semiconductor device including the same May 14, 2015 Issued
Array ( [id] => 10651912 [patent_doc_number] => 09368173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-14 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/713812 [patent_app_country] => US [patent_app_date] => 2015-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3746 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14713812 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/713812
Semiconductor memory device May 14, 2015 Issued
Array ( [id] => 11239710 [patent_doc_number] => 09466355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Memory architecture dividing memory cell array into independent memory banks' [patent_app_type] => utility [patent_app_number] => 14/711782 [patent_app_country] => US [patent_app_date] => 2015-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6149 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14711782 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/711782
Memory architecture dividing memory cell array into independent memory banks May 13, 2015 Issued
Array ( [id] => 11652232 [patent_doc_number] => 20170148133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'SENSOR MODULE, METHOD OF CONTROLLING THE SAME, AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/310186 [patent_app_country] => US [patent_app_date] => 2015-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9003 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15310186 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/310186
Sensor module, method of controlling the same, and electronic apparatus May 11, 2015 Issued
Array ( [id] => 13653441 [patent_doc_number] => 09853041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-26 [patent_title] => Semiconductor device and methods of manufacturing and operating the same [patent_app_type] => utility [patent_app_number] => 14/701189 [patent_app_country] => US [patent_app_date] => 2015-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6153 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14701189 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/701189
Semiconductor device and methods of manufacturing and operating the same Apr 29, 2015 Issued
Array ( [id] => 11839840 [patent_doc_number] => 20170221560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'RESISTIVE ELEMENTS TO OPERATE AS A MATRIX OF PROBABILITIES' [patent_app_type] => utility [patent_app_number] => 15/500500 [patent_app_country] => US [patent_app_date] => 2015-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6204 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15500500 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/500500
Resistive elements to operate as a matrix of probabilities Apr 22, 2015 Issued
Array ( [id] => 12953044 [patent_doc_number] => 09837154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Resistive random access memory (RRAM) system [patent_app_type] => utility [patent_app_number] => 15/500472 [patent_app_country] => US [patent_app_date] => 2015-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6295 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15500472 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/500472
Resistive random access memory (RRAM) system Apr 14, 2015 Issued
Array ( [id] => 10771972 [patent_doc_number] => 20160118129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-28 [patent_title] => 'READ VOLTAGE ADJUSTMENT' [patent_app_type] => utility [patent_app_number] => 14/686100 [patent_app_country] => US [patent_app_date] => 2015-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8727 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14686100 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/686100
Read voltage adjustment Apr 13, 2015 Issued
Array ( [id] => 10725706 [patent_doc_number] => 20160071854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'FLASH MEMORY STRUCTURE AND METHOD OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/685614 [patent_app_country] => US [patent_app_date] => 2015-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3161 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14685614 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/685614
Flash memory structure and method of making the same Apr 13, 2015 Issued
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