Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17992950 [patent_doc_number] => 20220358987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SEMICONDUCTOR DEVICE HAVING INTERCONNECTION IN PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/872720 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872720
Semiconductor device having interconnection in package and method for manufacturing the same Jul 24, 2022 Issued
Array ( [id] => 18279212 [patent_doc_number] => 20230094684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => MEMORY DEVICE AND METHOD FOR CONTROLLING ROW HAMMER [patent_app_type] => utility [patent_app_number] => 17/871917 [patent_app_country] => US [patent_app_date] => 2022-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/871917
Memory device and method for controlling row hammer Jul 22, 2022 Issued
Array ( [id] => 17986131 [patent_doc_number] => 20220352168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => Method of Operating Semiconductor Memory Device with Floating Body Transistor Using Silicon Controlled Rectifier Principle [patent_app_type] => utility [patent_app_number] => 17/863721 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863721 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/863721
Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle Jul 12, 2022 Issued
Array ( [id] => 18804152 [patent_doc_number] => 11837315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Transferring data between DRAM and SRAM [patent_app_type] => utility [patent_app_number] => 17/855212 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4854 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855212 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855212
Transferring data between DRAM and SRAM Jun 29, 2022 Issued
Array ( [id] => 18361774 [patent_doc_number] => 20230143365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => MEMORY DEVICE AND METHOD FOR CALIBRATING THE DEVICE AND FABRICATING THE DEVICE [patent_app_type] => utility [patent_app_number] => 17/852664 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852664 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852664
Memory device and method for calibrating the device and fabricating the device Jun 28, 2022 Issued
Array ( [id] => 19459959 [patent_doc_number] => 12100461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Non-volatile memory with suspension period during programming [patent_app_type] => utility [patent_app_number] => 17/852786 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 19136 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852786 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852786
Non-volatile memory with suspension period during programming Jun 28, 2022 Issued
Array ( [id] => 18865583 [patent_doc_number] => 20230420020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => APPARATUS FOR CONTROLLING ACCESS TO A MEMORY DEVICE AND MEMORY SYSTEM COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 17/852344 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852344 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852344
Apparatus for controlling access to a memory device and memory system comprising the same Jun 27, 2022 Issued
Array ( [id] => 19062935 [patent_doc_number] => 11942180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 17/809114 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 37 [patent_no_of_words] => 20111 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809114 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809114
Memory system Jun 26, 2022 Issued
Array ( [id] => 19183577 [patent_doc_number] => 11990173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Dynamic row hammering threshold for memory [patent_app_type] => utility [patent_app_number] => 17/809144 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 14638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809144
Dynamic row hammering threshold for memory Jun 26, 2022 Issued
Array ( [id] => 17917194 [patent_doc_number] => 20220319590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/846889 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12312 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846889 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846889
Semiconductor memory device Jun 21, 2022 Issued
Array ( [id] => 18706467 [patent_doc_number] => 11792999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Bipolar selector with independently tunable threshold voltages [patent_app_type] => utility [patent_app_number] => 17/845029 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 11084 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845029
Bipolar selector with independently tunable threshold voltages Jun 20, 2022 Issued
Array ( [id] => 18688132 [patent_doc_number] => 11783875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Circuits and methods for in-memory computing [patent_app_type] => utility [patent_app_number] => 17/828964 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4953 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17828964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/828964
Circuits and methods for in-memory computing May 30, 2022 Issued
Array ( [id] => 18639257 [patent_doc_number] => 11763873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Power mode wake-up for memory on different power domains [patent_app_type] => utility [patent_app_number] => 17/824260 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824260 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824260
Power mode wake-up for memory on different power domains May 24, 2022 Issued
Array ( [id] => 18848506 [patent_doc_number] => 20230410910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => APPARATUS AND METHODS FOR PROGRAMMING MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/752208 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752208 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752208
Apparatus and methods for programming memory cells May 23, 2022 Issued
Array ( [id] => 17840495 [patent_doc_number] => 20220277801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, CONTROLLER FOR CONTROLLING THE SAME, AND STORAGE DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 17/749607 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749607 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749607
Non-volatile memory device, operating method thereof, controller for controlling the same, and storage device having the same May 19, 2022 Issued
Array ( [id] => 19399492 [patent_doc_number] => 12073877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Robust circuit for negative bit line generation in SRAM cells [patent_app_type] => utility [patent_app_number] => 17/749224 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 9648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749224 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749224
Robust circuit for negative bit line generation in SRAM cells May 19, 2022 Issued
Array ( [id] => 18548015 [patent_doc_number] => 11721373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Shared multi-port memory from single port [patent_app_type] => utility [patent_app_number] => 17/750297 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7603 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750297 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750297
Shared multi-port memory from single port May 19, 2022 Issued
Array ( [id] => 18609889 [patent_doc_number] => 11751387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/749105 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6147 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749105 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749105
Semiconductor device May 18, 2022 Issued
Array ( [id] => 19414512 [patent_doc_number] => 12080346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Memory device, integrated circuit device and method [patent_app_type] => utility [patent_app_number] => 17/746244 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15279 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746244
Memory device, integrated circuit device and method May 16, 2022 Issued
Array ( [id] => 17992942 [patent_doc_number] => 20220358979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SIGNAL PROCESSING CIRCUIT, CHIP AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/660154 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660154 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660154
Signal processing circuit, chip and electronic device Apr 20, 2022 Issued
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