
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8949082
[patent_doc_number] => 20130194862
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-01
[patent_title] => 'NON-VOLATILE FLIP-FLOP'
[patent_app_type] => utility
[patent_app_number] => 13/361760
[patent_app_country] => US
[patent_app_date] => 2012-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9950
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13361760
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/361760 | Non-volatile flip-flop | Jan 29, 2012 | Issued |
Array
(
[id] => 8938621
[patent_doc_number] => 20130188418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-25
[patent_title] => 'MAGNETORESISTIVE RANDOM ACCESS MEMORY'
[patent_app_type] => utility
[patent_app_number] => 13/356920
[patent_app_country] => US
[patent_app_date] => 2012-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3281
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356920
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/356920 | Magnetoresistive random access memory | Jan 23, 2012 | Issued |
Array
(
[id] => 9246848
[patent_doc_number] => 08611138
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-17
[patent_title] => 'Circuits and methods for hardening volatile memory circuits through one time programming'
[patent_app_type] => utility
[patent_app_number] => 13/354740
[patent_app_country] => US
[patent_app_date] => 2012-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4555
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354740
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/354740 | Circuits and methods for hardening volatile memory circuits through one time programming | Jan 19, 2012 | Issued |
Array
(
[id] => 8636200
[patent_doc_number] => 20130028003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-31
[patent_title] => 'NONVOLATILE MEMORY DEVICE HAVING A CURRENT LIMITING ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/353000
[patent_app_country] => US
[patent_app_date] => 2012-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 15862
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13353000
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/353000 | Nonvolatile memory device having a current limiting element | Jan 17, 2012 | Issued |
Array
(
[id] => 8864749
[patent_doc_number] => 20130148452
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-13
[patent_title] => 'VOLTAGE SHIFTING SENSE AMPLIFIER FOR SRAM VMIN IMPROVEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/324550
[patent_app_country] => US
[patent_app_date] => 2011-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4296
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13324550
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/324550 | Voltage shifting sense amplifier for SRAM VMIN improvement | Dec 12, 2011 | Issued |
Array
(
[id] => 8926741
[patent_doc_number] => 20130182501
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-18
[patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND ITS MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/824888
[patent_app_country] => US
[patent_app_date] => 2011-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 42
[patent_no_of_words] => 21404
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13824888
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/824888 | Semiconductor storage device and its manufacturing method | Dec 5, 2011 | Issued |
Array
(
[id] => 8052403
[patent_doc_number] => 20120075926
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-29
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/312620
[patent_app_country] => US
[patent_app_date] => 2011-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 16065
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0075/20120075926.pdf
[firstpage_image] =>[orig_patent_app_number] => 13312620
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/312620 | Semiconductor device | Dec 5, 2011 | Issued |
Array
(
[id] => 9751005
[patent_doc_number] => 08842492
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-23
[patent_title] => 'Memory components and controllers that utilize multiphase synchronous timing references'
[patent_app_type] => utility
[patent_app_number] => 13/823866
[patent_app_country] => US
[patent_app_date] => 2011-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 15896
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13823866
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/823866 | Memory components and controllers that utilize multiphase synchronous timing references | Nov 18, 2011 | Issued |
Array
(
[id] => 7816636
[patent_doc_number] => 20120063256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'MEMORY DEVICE WORD LINE DRIVERS AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 13/298104
[patent_app_country] => US
[patent_app_date] => 2011-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6169
[patent_no_of_claims] => 61
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0063/20120063256.pdf
[firstpage_image] =>[orig_patent_app_number] => 13298104
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/298104 | Memory device word line drivers and methods | Nov 15, 2011 | Issued |
Array
(
[id] => 8820021
[patent_doc_number] => 20130121066
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-16
[patent_title] => 'CIRCUIT AND METHOD FOR GENERATING A REFERENCE LEVEL FOR A MAGNETIC RANDOM ACCESS MEMORY ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/293565
[patent_app_country] => US
[patent_app_date] => 2011-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4831
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13293565
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/293565 | Circuit and method for generating a reference level for a magnetic random access memory element | Nov 9, 2011 | Issued |
Array
(
[id] => 8922445
[patent_doc_number] => 08488388
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-16
[patent_title] => 'Method of programming a split gate non-volatile floating gate memory cell having a separate erase gate'
[patent_app_type] => utility
[patent_app_number] => 13/286933
[patent_app_country] => US
[patent_app_date] => 2011-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2519
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13286933
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/286933 | Method of programming a split gate non-volatile floating gate memory cell having a separate erase gate | Oct 31, 2011 | Issued |
Array
(
[id] => 9185430
[patent_doc_number] => 08625376
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-07
[patent_title] => 'Semiconductor memory device and method of operation the same'
[patent_app_type] => utility
[patent_app_number] => 13/286595
[patent_app_country] => US
[patent_app_date] => 2011-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4262
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13286595
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/286595 | Semiconductor memory device and method of operation the same | Oct 31, 2011 | Issued |
Array
(
[id] => 9228590
[patent_doc_number] => 08634264
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-21
[patent_title] => 'Apparatuses, integrated circuits, and methods for measuring leakage current'
[patent_app_type] => utility
[patent_app_number] => 13/282308
[patent_app_country] => US
[patent_app_date] => 2011-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 6528
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13282308
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/282308 | Apparatuses, integrated circuits, and methods for measuring leakage current | Oct 25, 2011 | Issued |
Array
(
[id] => 8773932
[patent_doc_number] => 08427899
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-23
[patent_title] => 'Self-adaptive sensing design'
[patent_app_type] => utility
[patent_app_number] => 13/281966
[patent_app_country] => US
[patent_app_date] => 2011-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4430
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13281966
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/281966 | Self-adaptive sensing design | Oct 25, 2011 | Issued |
Array
(
[id] => 8311801
[patent_doc_number] => 20120188830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-26
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE CORRECTING FUSE DATA AND METHOD OF OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/281762
[patent_app_country] => US
[patent_app_date] => 2011-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4066
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13281762
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/281762 | Semiconductor memory device correcting fuse data and method of operating the same | Oct 25, 2011 | Issued |
Array
(
[id] => 8809116
[patent_doc_number] => 08446777
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-21
[patent_title] => 'Non-volatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/280618
[patent_app_country] => US
[patent_app_date] => 2011-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 29
[patent_no_of_words] => 8591
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13280618
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/280618 | Non-volatile semiconductor memory device | Oct 24, 2011 | Issued |
Array
(
[id] => 8910885
[patent_doc_number] => 08482957
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-09
[patent_title] => 'Three dimensionally stacked non volatile memory units'
[patent_app_type] => utility
[patent_app_number] => 13/280395
[patent_app_country] => US
[patent_app_date] => 2011-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 21
[patent_no_of_words] => 9569
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13280395
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/280395 | Three dimensionally stacked non volatile memory units | Oct 24, 2011 | Issued |
Array
(
[id] => 7773131
[patent_doc_number] => 20120038012
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-16
[patent_title] => 'TMR device with novel free layer structure'
[patent_app_type] => utility
[patent_app_number] => 13/317485
[patent_app_country] => US
[patent_app_date] => 2011-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6118
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20120038012.pdf
[firstpage_image] =>[orig_patent_app_number] => 13317485
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/317485 | TMR device with novel free layer structure | Oct 18, 2011 | Issued |
Array
(
[id] => 8130441
[patent_doc_number] => 20120089768
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-12
[patent_title] => 'STATIC WEAR LEVELING'
[patent_app_type] => utility
[patent_app_number] => 13/274771
[patent_app_country] => US
[patent_app_date] => 2011-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4837
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20120089768.pdf
[firstpage_image] =>[orig_patent_app_number] => 13274771
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/274771 | Static wear leveling | Oct 16, 2011 | Issued |
| 13/267804 | SEMICONDUCTOR MEMORY DEVICE WITH REDUCED DATA ACCESS TIME | Oct 5, 2011 | Abandoned |