Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4674744 [patent_doc_number] => 20080212372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'Nonvolatile memory devices that support virtual page storage using odd-state memory cells and methods of programming same' [patent_app_type] => utility [patent_app_number] => 12/119608 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4881 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20080212372.pdf [firstpage_image] =>[orig_patent_app_number] => 12119608 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119608
Nonvolatile memory devices that support virtual page storage using odd-state memory cells and methods of programming same May 12, 2008 Issued
Array ( [id] => 7016 [patent_doc_number] => 07813183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Program and erase methods for nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 12/119060 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 40 [patent_no_of_words] => 9761 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/813/07813183.pdf [firstpage_image] =>[orig_patent_app_number] => 12119060 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119060
Program and erase methods for nonvolatile memory May 11, 2008 Issued
Array ( [id] => 55589 [patent_doc_number] => 07773432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-10 [patent_title] => 'Semiconductor memory device with normal and over-drive operations' [patent_app_type] => utility [patent_app_number] => 12/118810 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 7550 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/773/07773432.pdf [firstpage_image] =>[orig_patent_app_number] => 12118810 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/118810
Semiconductor memory device with normal and over-drive operations May 11, 2008 Issued
Array ( [id] => 5574218 [patent_doc_number] => 20090141579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'Power Up/Down Sequence Scheme for Memory Devices' [patent_app_type] => utility [patent_app_number] => 12/119092 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20090141579.pdf [firstpage_image] =>[orig_patent_app_number] => 12119092 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119092
Power up/down sequence scheme for memory devices May 11, 2008 Issued
Array ( [id] => 5314776 [patent_doc_number] => 20090279374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'SYSTEM AND METHOD FOR MITIGATING REVERSE BIAS LEAKAGE' [patent_app_type] => utility [patent_app_number] => 12/118420 [patent_app_country] => US [patent_app_date] => 2008-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10562 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20090279374.pdf [firstpage_image] =>[orig_patent_app_number] => 12118420 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/118420
System and method for mitigating reverse bias leakage May 8, 2008 Issued
Array ( [id] => 5335763 [patent_doc_number] => 20090052227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND METHOD FOR WRITING DATA THERETO' [patent_app_type] => utility [patent_app_number] => 12/118064 [patent_app_country] => US [patent_app_date] => 2008-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20090052227.pdf [firstpage_image] =>[orig_patent_app_number] => 12118064 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/118064
Non-volatile memory device and method for writing data thereto May 8, 2008 Issued
Array ( [id] => 4838525 [patent_doc_number] => 20080279010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/118554 [patent_app_country] => US [patent_app_date] => 2008-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20080279010.pdf [firstpage_image] =>[orig_patent_app_number] => 12118554 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/118554
Flash memory device and program method thereof May 8, 2008 Issued
Array ( [id] => 4662285 [patent_doc_number] => 20080253192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 12/118330 [patent_app_country] => US [patent_app_date] => 2008-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 22331 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253192.pdf [firstpage_image] =>[orig_patent_app_number] => 12118330 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/118330
Semiconductor integrated circuit device May 8, 2008 Issued
Array ( [id] => 4447763 [patent_doc_number] => 07864590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Non-volatile memory device and method of operating the same' [patent_app_type] => utility [patent_app_number] => 12/117702 [patent_app_country] => US [patent_app_date] => 2008-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3354 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/864/07864590.pdf [firstpage_image] =>[orig_patent_app_number] => 12117702 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/117702
Non-volatile memory device and method of operating the same May 7, 2008 Issued
Array ( [id] => 4725575 [patent_doc_number] => 20080205116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'THREE-DIMENSIONAL MAGNETIC MEMORY' [patent_app_type] => utility [patent_app_number] => 12/116111 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11685 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20080205116.pdf [firstpage_image] =>[orig_patent_app_number] => 12116111 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/116111
Three-dimensional magnetic memory having bits transferrable between storage layers May 5, 2008 Issued
Array ( [id] => 4725602 [patent_doc_number] => 20080205143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING PROTECTION FUNCTION FOR EACH MEMORY BLOCK' [patent_app_type] => utility [patent_app_number] => 12/108272 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9450 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20080205143.pdf [firstpage_image] =>[orig_patent_app_number] => 12108272 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108272
Nonvolatile semiconductor memory device having protection function for each memory block Apr 22, 2008 Issued
Array ( [id] => 7592289 [patent_doc_number] => 07652916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'SCR matrix storage device' [patent_app_type] => utility [patent_app_number] => 12/107500 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5220 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/652/07652916.pdf [firstpage_image] =>[orig_patent_app_number] => 12107500 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107500
SCR matrix storage device Apr 21, 2008 Issued
Array ( [id] => 4522190 [patent_doc_number] => 07911842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups' [patent_app_type] => utility [patent_app_number] => 12/081568 [patent_app_country] => US [patent_app_date] => 2008-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4341 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911842.pdf [firstpage_image] =>[orig_patent_app_number] => 12081568 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/081568
Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups Apr 16, 2008 Issued
Array ( [id] => 164692 [patent_doc_number] => 07672167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 12/081358 [patent_app_country] => US [patent_app_date] => 2008-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5270 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/672/07672167.pdf [firstpage_image] =>[orig_patent_app_number] => 12081358 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/081358
Non-volatile memory device Apr 14, 2008 Issued
Array ( [id] => 4871936 [patent_doc_number] => 20080198670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'Reduced power programming of non-volatile cells' [patent_app_type] => utility [patent_app_number] => 12/081282 [patent_app_country] => US [patent_app_date] => 2008-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3955 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20080198670.pdf [firstpage_image] =>[orig_patent_app_number] => 12081282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/081282
Reduced power programming of non-volatile cells Apr 13, 2008 Issued
Array ( [id] => 4681015 [patent_doc_number] => 20080247241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'SENSING IN NON-VOLATILE STORAGE USING PULLDOWN TO REGULATED SOURCE VOLTAGE TO REMOVE SYSTEM NOISE' [patent_app_type] => utility [patent_app_number] => 12/099439 [patent_app_country] => US [patent_app_date] => 2008-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 18915 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0247/20080247241.pdf [firstpage_image] =>[orig_patent_app_number] => 12099439 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099439
Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise Apr 7, 2008 Issued
Array ( [id] => 144141 [patent_doc_number] => 07688612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Bit line structure for a multilevel, dual-sided nonvolatile memory cell array' [patent_app_type] => utility [patent_app_number] => 12/080894 [patent_app_country] => US [patent_app_date] => 2008-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8542 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/688/07688612.pdf [firstpage_image] =>[orig_patent_app_number] => 12080894 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/080894
Bit line structure for a multilevel, dual-sided nonvolatile memory cell array Apr 6, 2008 Issued
Array ( [id] => 5568598 [patent_doc_number] => 20090251976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'Method and apparatus for DQS postamble detection and drift compensation in a double data rate (DDR) physical interface' [patent_app_type] => utility [patent_app_number] => 12/082100 [patent_app_country] => US [patent_app_date] => 2008-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4626 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20090251976.pdf [firstpage_image] =>[orig_patent_app_number] => 12082100 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/082100
Method and apparatus for DQS postamble detection and drift compensation in a double data rate (DDR) physical interface Apr 6, 2008 Issued
Array ( [id] => 84243 [patent_doc_number] => 07746712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Semiconductor memory device including post package repair control circuit and post package repair method' [patent_app_type] => utility [patent_app_number] => 12/080728 [patent_app_country] => US [patent_app_date] => 2008-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6631 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/746/07746712.pdf [firstpage_image] =>[orig_patent_app_number] => 12080728 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/080728
Semiconductor memory device including post package repair control circuit and post package repair method Apr 3, 2008 Issued
Array ( [id] => 286538 [patent_doc_number] => 07551468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => '276-pin buffered memory module with enhanced fault tolerance' [patent_app_type] => utility [patent_app_number] => 12/060992 [patent_app_country] => US [patent_app_date] => 2008-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 6614 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/551/07551468.pdf [firstpage_image] =>[orig_patent_app_number] => 12060992 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/060992
276-pin buffered memory module with enhanced fault tolerance Apr 1, 2008 Issued
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