
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 360665
[patent_doc_number] => 07486544
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[patent_kind] => B2
[patent_issue_date] => 2009-02-03
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => utility
[patent_app_number] => 11/826636
[patent_app_country] => US
[patent_app_date] => 2007-07-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/826636 | Semiconductor integrated circuit device | Jul 16, 2007 | Issued |
Array
(
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[patent_issue_date] => 2007-11-15
[patent_title] => 'Methods and devices for preventing data stored in memory from being read out'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/826367 | Methods and devices for preventing data stored in memory from being read out | Jul 12, 2007 | Issued |
Array
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[patent_issue_date] => 2009-07-07
[patent_title] => 'Device and method having a memory array storing each bit in multiple memory cells'
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Array
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[patent_title] => 'Memory and operation method thereof'
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Array
(
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[patent_doc_number] => 20090010077
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[patent_title] => 'SHIFT REGISTER LATCH WITH EMBEDDED DYNAMIC RANDOM ACCESS MEMORY SCAN ONLY CELL'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/772592 | Shift register latch with embedded dynamic random access memory scan only cell | Jul 1, 2007 | Issued |
Array
(
[id] => 5347731
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[firstpage_image] =>[orig_patent_app_number] => 11772188
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/772188 | Device selection circuit and method | Jun 29, 2007 | Issued |
Array
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[patent_title] => 'Method for source bias all bit line sensing in non-volatile storage'
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Array
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[patent_doc_number] => 20080247253
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[patent_title] => 'NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DURING SENSE OPERATIONS'
[patent_app_type] => utility
[patent_app_number] => 11/772018
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/772018 | NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DURING SENSE OPERATIONS | Jun 28, 2007 | Abandoned |
Array
(
[id] => 4681003
[patent_doc_number] => 20080247229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'NON-VOLATILE STORAGE USING CURRENT SENSING WITH BIASING OF SOURCE AND P-Well'
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[patent_app_number] => 11/771997
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Array
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[patent_title] => 'Non-volatile storage with current sensing of negative threshold voltages'
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Array
(
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[patent_title] => 'METHOD OF PROGRAMMING DATA IN A FLASH MEMORY DEVICE'
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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[patent_title] => 'METHODS OF PROGRAMMING NON-VOLATILE MEMORY DEVICES INCLUDING TRANSITION METAL OXIDE LAYER AS DATA STORAGE MATERIAL LAYER AND DEVICES SO OPERATED'
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