
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4681003
[patent_doc_number] => 20080247229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'NON-VOLATILE STORAGE USING CURRENT SENSING WITH BIASING OF SOURCE AND P-Well'
[patent_app_type] => utility
[patent_app_number] => 11/771997
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 17575
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0247/20080247229.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771997
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771997 | Non-volatile storage using current sensing with biasing of source and P-Well | Jun 28, 2007 | Issued |
Array
(
[id] => 4717328
[patent_doc_number] => 20080239850
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'APPARATUS OF PROCESSING A SIGNAL IN A MEMORY DEVICE AND A CIRCUIT OF REMOVING NOISE IN THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/771998
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4643
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0239/20080239850.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771998
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771998 | Apparatus of processing a signal in a memory device and a circuit of removing noise in the same | Jun 28, 2007 | Issued |
Array
(
[id] => 308438
[patent_doc_number] => 07532516
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-12
[patent_title] => 'Non-volatile storage with current sensing of negative threshold voltages'
[patent_app_type] => utility
[patent_app_number] => 11/771987
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 39
[patent_no_of_words] => 17668
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/532/07532516.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771987
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771987 | Non-volatile storage with current sensing of negative threshold voltages | Jun 28, 2007 | Issued |
Array
(
[id] => 293380
[patent_doc_number] => 07545678
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-09
[patent_title] => 'Non-volatile storage with source bias all bit line sensing'
[patent_app_type] => utility
[patent_app_number] => 11/772009
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 39
[patent_no_of_words] => 17004
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/545/07545678.pdf
[firstpage_image] =>[orig_patent_app_number] => 11772009
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/772009 | Non-volatile storage with source bias all bit line sensing | Jun 28, 2007 | Issued |
Array
(
[id] => 357112
[patent_doc_number] => 07489554
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-10
[patent_title] => 'Method for current sensing with biasing of source and P-well in non-volatile storage'
[patent_app_type] => utility
[patent_app_number] => 11/771992
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 39
[patent_no_of_words] => 17418
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/489/07489554.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771992
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771992 | Method for current sensing with biasing of source and P-well in non-volatile storage | Jun 28, 2007 | Issued |
Array
(
[id] => 5209379
[patent_doc_number] => 20070247963
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-25
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/767025
[patent_app_country] => US
[patent_app_date] => 2007-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 7290
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0247/20070247963.pdf
[firstpage_image] =>[orig_patent_app_number] => 11767025
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/767025 | Semiconductor memory device | Jun 21, 2007 | Issued |
Array
(
[id] => 289831
[patent_doc_number] => 07548450
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-16
[patent_title] => 'Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device'
[patent_app_type] => utility
[patent_app_number] => 11/812294
[patent_app_country] => US
[patent_app_date] => 2007-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 30
[patent_no_of_words] => 7421
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/548/07548450.pdf
[firstpage_image] =>[orig_patent_app_number] => 11812294
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/812294 | Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device | Jun 17, 2007 | Issued |
Array
(
[id] => 5088731
[patent_doc_number] => 20070228370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-04
[patent_title] => 'METHODS OF PROGRAMMING NON-VOLATILE MEMORY DEVICES INCLUDING TRANSITION METAL OXIDE LAYER AS DATA STORAGE MATERIAL LAYER AND DEVICES SO OPERATED'
[patent_app_type] => utility
[patent_app_number] => 11/762483
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3997
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0228/20070228370.pdf
[firstpage_image] =>[orig_patent_app_number] => 11762483
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/762483 | Methods of programming non-volatile memory devices including transition metal oxide layer as data storage material layer and devices so operated | Jun 12, 2007 | Issued |
Array
(
[id] => 367508
[patent_doc_number] => 07480193
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-20
[patent_title] => 'Memory component with multiple delayed timing signals'
[patent_app_type] => utility
[patent_app_number] => 11/746007
[patent_app_country] => US
[patent_app_date] => 2007-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 11530
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/480/07480193.pdf
[firstpage_image] =>[orig_patent_app_number] => 11746007
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/746007 | Memory component with multiple delayed timing signals | May 7, 2007 | Issued |
Array
(
[id] => 5246295
[patent_doc_number] => 20070242529
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-18
[patent_title] => 'Method and Apparatus for Accessing Contents of Memory Cells'
[patent_app_type] => utility
[patent_app_number] => 11/745442
[patent_app_country] => US
[patent_app_date] => 2007-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5341
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0242/20070242529.pdf
[firstpage_image] =>[orig_patent_app_number] => 11745442
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/745442 | Method and apparatus for accessing contents of memory cells | May 6, 2007 | Issued |
Array
(
[id] => 5009508
[patent_doc_number] => 20070279986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY'
[patent_app_type] => utility
[patent_app_number] => 11/741936
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 23044
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0279/20070279986.pdf
[firstpage_image] =>[orig_patent_app_number] => 11741936
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741936 | Nonvolatile semiconductor memory | Apr 29, 2007 | Issued |
Array
(
[id] => 808417
[patent_doc_number] => 07420832
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-09-02
[patent_title] => 'Array split across three-dimensional interconnected chips'
[patent_app_type] => utility
[patent_app_number] => 11/741902
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 6008
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/420/07420832.pdf
[firstpage_image] =>[orig_patent_app_number] => 11741902
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741902 | Array split across three-dimensional interconnected chips | Apr 29, 2007 | Issued |
Array
(
[id] => 4858076
[patent_doc_number] => 20080266926
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'TRANSFER OF NON-ASSOCIATED INFORMATION ON FLASH MEMORY DEVICES'
[patent_app_type] => utility
[patent_app_number] => 11/741996
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6815
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0266/20080266926.pdf
[firstpage_image] =>[orig_patent_app_number] => 11741996
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741996 | Transfer of non-associated information on flash memory devices | Apr 29, 2007 | Issued |
Array
(
[id] => 596542
[patent_doc_number] => 07440316
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-10-21
[patent_title] => '8/9 and 8/10-bit encoding to reduce peak surge currents when writing phase-change memory'
[patent_app_type] => utility
[patent_app_number] => 11/741890
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 6478
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/440/07440316.pdf
[firstpage_image] =>[orig_patent_app_number] => 11741890
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741890 | 8/9 and 8/10-bit encoding to reduce peak surge currents when writing phase-change memory | Apr 29, 2007 | Issued |
Array
(
[id] => 271471
[patent_doc_number] => 07564710
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'Circuit for programming a memory element'
[patent_app_type] => utility
[patent_app_number] => 11/742090
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 24
[patent_no_of_words] => 11648
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/564/07564710.pdf
[firstpage_image] =>[orig_patent_app_number] => 11742090
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/742090 | Circuit for programming a memory element | Apr 29, 2007 | Issued |
Array
(
[id] => 4858079
[patent_doc_number] => 20080266929
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'REFERENCE CELL LAYOUT WITH ENHANCED RTN IMMUNITY'
[patent_app_type] => utility
[patent_app_number] => 11/741462
[patent_app_country] => US
[patent_app_date] => 2007-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1902
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0266/20080266929.pdf
[firstpage_image] =>[orig_patent_app_number] => 11741462
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741462 | Reference cell layout with enhanced RTN immunity | Apr 26, 2007 | Issued |
Array
(
[id] => 594713
[patent_doc_number] => 07443759
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-10-28
[patent_title] => 'Reduced-power memory with per-sector ground control'
[patent_app_type] => utility
[patent_app_number] => 11/740892
[patent_app_country] => US
[patent_app_date] => 2007-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 13889
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/443/07443759.pdf
[firstpage_image] =>[orig_patent_app_number] => 11740892
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/740892 | Reduced-power memory with per-sector ground control | Apr 25, 2007 | Issued |
Array
(
[id] => 7590402
[patent_doc_number] => 07663961
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-02-16
[patent_title] => 'Reduced-power memory with per-sector power/ground control and early address'
[patent_app_type] => utility
[patent_app_number] => 11/740901
[patent_app_country] => US
[patent_app_date] => 2007-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 13835
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/663/07663961.pdf
[firstpage_image] =>[orig_patent_app_number] => 11740901
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/740901 | Reduced-power memory with per-sector power/ground control and early address | Apr 25, 2007 | Issued |
Array
(
[id] => 5223998
[patent_doc_number] => 20070253264
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-01
[patent_title] => 'Integrated Semiconductor Memory with a Test Function and Method for Testing an Integrated Semiconductor Memory'
[patent_app_type] => utility
[patent_app_number] => 11/740768
[patent_app_country] => US
[patent_app_date] => 2007-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6543
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20070253264.pdf
[firstpage_image] =>[orig_patent_app_number] => 11740768
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/740768 | Integrated Semiconductor Memory with a Test Function and Method for Testing an Integrated Semiconductor Memory | Apr 25, 2007 | Abandoned |
Array
(
[id] => 596611
[patent_doc_number] => 07440327
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-10-21
[patent_title] => 'Non-volatile storage with reduced power consumption during read operations'
[patent_app_type] => utility
[patent_app_number] => 11/740096
[patent_app_country] => US
[patent_app_date] => 2007-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 25
[patent_no_of_words] => 15672
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/440/07440327.pdf
[firstpage_image] =>[orig_patent_app_number] => 11740096
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/740096 | Non-volatile storage with reduced power consumption during read operations | Apr 24, 2007 | Issued |