Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4953601 [patent_doc_number] => 20080186625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Data Storage Medium and Method for Accessing Digital Data Therein' [patent_app_type] => utility [patent_app_number] => 11/672216 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4754 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20080186625.pdf [firstpage_image] =>[orig_patent_app_number] => 11672216 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/672216
Data storage medium and method for accessing digital data therein Feb 6, 2007 Issued
Array ( [id] => 5099952 [patent_doc_number] => 20070183213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/701404 [patent_app_country] => US [patent_app_date] => 2007-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17174 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20070183213.pdf [firstpage_image] =>[orig_patent_app_number] => 11701404 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701404
Nonvolatile semiconductor memory device Feb 1, 2007 Issued
Array ( [id] => 4953762 [patent_doc_number] => 20080186786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'FAST AND ACCURATE SENSING AMPLIFIER FOR LOW VOLTAGE SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 11/670626 [patent_app_country] => US [patent_app_date] => 2007-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4467 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20080186786.pdf [firstpage_image] =>[orig_patent_app_number] => 11670626 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/670626
Fast and accurate sensing amplifier for low voltage semiconductor memory Feb 1, 2007 Issued
Array ( [id] => 804684 [patent_doc_number] => 07423901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-09 [patent_title] => 'Calibration system for writing and reading multiple states into phase change memory' [patent_app_type] => utility [patent_app_number] => 11/701338 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 7618 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/423/07423901.pdf [firstpage_image] =>[orig_patent_app_number] => 11701338 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701338
Calibration system for writing and reading multiple states into phase change memory Jan 31, 2007 Issued
Array ( [id] => 834816 [patent_doc_number] => 07397705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-08 [patent_title] => 'Method for programming multi-level cell memory array' [patent_app_type] => utility [patent_app_number] => 11/670382 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 8182 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/397/07397705.pdf [firstpage_image] =>[orig_patent_app_number] => 11670382 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/670382
Method for programming multi-level cell memory array Jan 31, 2007 Issued
Array ( [id] => 5099949 [patent_doc_number] => 20070183210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Program method of flash memory capable of compensating read margin reduced due to charge loss' [patent_app_type] => utility [patent_app_number] => 11/700834 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3970 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20070183210.pdf [firstpage_image] =>[orig_patent_app_number] => 11700834 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/700834
Program method of flash memory capable of compensating read margin reduced due to charge loss Jan 31, 2007 Issued
Array ( [id] => 4956456 [patent_doc_number] => 20080189480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Memory configured on a common substrate' [patent_app_type] => utility [patent_app_number] => 11/701006 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2369 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20080189480.pdf [firstpage_image] =>[orig_patent_app_number] => 11701006 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701006
Memory configured on a common substrate Jan 31, 2007 Issued
Array ( [id] => 4844635 [patent_doc_number] => 20080181043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'Configurable device ID in non-volatile memory' [patent_app_type] => utility [patent_app_number] => 11/701302 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2645 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20080181043.pdf [firstpage_image] =>[orig_patent_app_number] => 11701302 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701302
Configurable device ID in non-volatile memory Jan 30, 2007 Issued
Array ( [id] => 818375 [patent_doc_number] => 07411838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-12 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/700184 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 6280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/411/07411838.pdf [firstpage_image] =>[orig_patent_app_number] => 11700184 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/700184
Semiconductor memory device Jan 30, 2007 Issued
Array ( [id] => 850453 [patent_doc_number] => 07382670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/669420 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7979 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/382/07382670.pdf [firstpage_image] =>[orig_patent_app_number] => 11669420 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669420
Semiconductor integrated circuit device Jan 30, 2007 Issued
Array ( [id] => 5099961 [patent_doc_number] => 20070183222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/700186 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4787 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20070183222.pdf [firstpage_image] =>[orig_patent_app_number] => 11700186 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/700186
Semiconductor memory device Jan 30, 2007 Issued
Array ( [id] => 364853 [patent_doc_number] => 07483313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-27 [patent_title] => 'Dual ported memory with selective read and write protection' [patent_app_type] => utility [patent_app_number] => 11/669792 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2990 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/483/07483313.pdf [firstpage_image] =>[orig_patent_app_number] => 11669792 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669792
Dual ported memory with selective read and write protection Jan 30, 2007 Issued
Array ( [id] => 834835 [patent_doc_number] => 07397710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same' [patent_app_type] => utility [patent_app_number] => 11/700417 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 21935 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/397/07397710.pdf [firstpage_image] =>[orig_patent_app_number] => 11700417 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/700417
Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same Jan 30, 2007 Issued
Array ( [id] => 4690072 [patent_doc_number] => 20080034253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-07 [patent_title] => 'FERROELECTRIC MEMORY WITH SPARE MEMORY CELL ARRAY AND ECC CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/668706 [patent_app_country] => US [patent_app_date] => 2007-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6560 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20080034253.pdf [firstpage_image] =>[orig_patent_app_number] => 11668706 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/668706
Ferroelectric memory with spare memory cell array and ECC circuit Jan 29, 2007 Issued
Array ( [id] => 4844638 [patent_doc_number] => 20080181046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'CLOCK CIRCUITRY FOR DDR-SDRAM MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 11/668844 [patent_app_country] => US [patent_app_date] => 2007-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7905 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20080181046.pdf [firstpage_image] =>[orig_patent_app_number] => 11668844 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/668844
Clock circuitry for DDR-SDRAM memory controller Jan 29, 2007 Issued
Array ( [id] => 300830 [patent_doc_number] => 07539036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-26 [patent_title] => 'Semiconductor memory device including plurality of memory mats' [patent_app_type] => utility [patent_app_number] => 11/699386 [patent_app_country] => US [patent_app_date] => 2007-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5933 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/539/07539036.pdf [firstpage_image] =>[orig_patent_app_number] => 11699386 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/699386
Semiconductor memory device including plurality of memory mats Jan 29, 2007 Issued
Array ( [id] => 5118285 [patent_doc_number] => 20070139999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Magnetic memory device' [patent_app_type] => utility [patent_app_number] => 11/698872 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6437 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20070139999.pdf [firstpage_image] =>[orig_patent_app_number] => 11698872 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/698872
Magnetic memory device Jan 28, 2007 Issued
Array ( [id] => 5099920 [patent_doc_number] => 20070183181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Electrically programmable fuse bit' [patent_app_type] => utility [patent_app_number] => 11/699916 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4607 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20070183181.pdf [firstpage_image] =>[orig_patent_app_number] => 11699916 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/699916
Electrically programmable fuse bit Jan 28, 2007 Issued
Array ( [id] => 4806880 [patent_doc_number] => 20080170458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-17 [patent_title] => 'APPARATUS AND METHOD FOR REDUCING LEAKAGE CURRENTS OF INTEGRATED CIRCUITS HAVING AT LEAST ONE TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/668214 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4731 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20080170458.pdf [firstpage_image] =>[orig_patent_app_number] => 11668214 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/668214
Apparatus and method for reducing leakage currents of integrated circuits having at least one transistor Jan 28, 2007 Issued
Array ( [id] => 5251805 [patent_doc_number] => 20070133261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 11/698880 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4937 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20070133261.pdf [firstpage_image] =>[orig_patent_app_number] => 11698880 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/698880
Semiconductor storage device Jan 28, 2007 Abandoned
Menu