
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 364853
[patent_doc_number] => 07483313
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-27
[patent_title] => 'Dual ported memory with selective read and write protection'
[patent_app_type] => utility
[patent_app_number] => 11/669792
[patent_app_country] => US
[patent_app_date] => 2007-01-31
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[pdf_file] => patents/07/483/07483313.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/669792 | Dual ported memory with selective read and write protection | Jan 30, 2007 | Issued |
Array
(
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[patent_doc_number] => 20080181046
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[patent_kind] => A1
[patent_issue_date] => 2008-07-31
[patent_title] => 'CLOCK CIRCUITRY FOR DDR-SDRAM MEMORY CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 11/668844
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[patent_app_date] => 2007-01-30
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[firstpage_image] =>[orig_patent_app_number] => 11668844
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/668844 | Clock circuitry for DDR-SDRAM memory controller | Jan 29, 2007 | Issued |
Array
(
[id] => 300830
[patent_doc_number] => 07539036
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-26
[patent_title] => 'Semiconductor memory device including plurality of memory mats'
[patent_app_type] => utility
[patent_app_number] => 11/699386
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/699386 | Semiconductor memory device including plurality of memory mats | Jan 29, 2007 | Issued |
Array
(
[id] => 4690072
[patent_doc_number] => 20080034253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-07
[patent_title] => 'FERROELECTRIC MEMORY WITH SPARE MEMORY CELL ARRAY AND ECC CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/668706
[patent_app_country] => US
[patent_app_date] => 2007-01-30
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[firstpage_image] =>[orig_patent_app_number] => 11668706
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/668706 | Ferroelectric memory with spare memory cell array and ECC circuit | Jan 29, 2007 | Issued |
Array
(
[id] => 4806880
[patent_doc_number] => 20080170458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-17
[patent_title] => 'APPARATUS AND METHOD FOR REDUCING LEAKAGE CURRENTS OF INTEGRATED CIRCUITS HAVING AT LEAST ONE TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 11/668214
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[firstpage_image] =>[orig_patent_app_number] => 11668214
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/668214 | Apparatus and method for reducing leakage currents of integrated circuits having at least one transistor | Jan 28, 2007 | Issued |
Array
(
[id] => 5118285
[patent_doc_number] => 20070139999
[patent_country] => US
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[patent_issue_date] => 2007-06-21
[patent_title] => 'Magnetic memory device'
[patent_app_type] => utility
[patent_app_number] => 11/698872
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Array
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[id] => 5251805
[patent_doc_number] => 20070133261
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[patent_issue_date] => 2007-06-14
[patent_title] => 'Semiconductor storage device'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 11698880
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/698880 | Semiconductor storage device | Jan 28, 2007 | Abandoned |
Array
(
[id] => 5099920
[patent_doc_number] => 20070183181
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[patent_issue_date] => 2007-08-09
[patent_title] => 'Electrically programmable fuse bit'
[patent_app_type] => utility
[patent_app_number] => 11/699916
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[firstpage_image] =>[orig_patent_app_number] => 11699916
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/699916 | Electrically programmable fuse bit | Jan 28, 2007 | Issued |
Array
(
[id] => 572077
[patent_doc_number] => 07471540
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-30
[patent_title] => 'Non-volatile semiconductor memory based on enhanced gate oxide breakdown'
[patent_app_type] => utility
[patent_app_number] => 11/657982
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/657982 | Non-volatile semiconductor memory based on enhanced gate oxide breakdown | Jan 23, 2007 | Issued |
Array
(
[id] => 36139
[patent_doc_number] => 07787321
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-31
[patent_title] => 'High performance sense amplifier and method thereof for memory system'
[patent_app_type] => utility
[patent_app_number] => 11/623894
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[patent_app_date] => 2007-01-17
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[pdf_file] => patents/07/787/07787321.pdf
[firstpage_image] =>[orig_patent_app_number] => 11623894
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/623894 | High performance sense amplifier and method thereof for memory system | Jan 16, 2007 | Issued |
Array
(
[id] => 5187148
[patent_doc_number] => 20070165456
[patent_country] => US
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[patent_issue_date] => 2007-07-19
[patent_title] => 'System and method for purge of flash memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/654317 | System and method for purge of flash memory | Jan 16, 2007 | Abandoned |
Array
(
[id] => 4969888
[patent_doc_number] => 20070109890
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[patent_title] => 'Memory, processing system and methods for use therewith'
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Array
(
[id] => 838475
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Array
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[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/616112 | Semiconductor integrated circuit device | Dec 25, 2006 | Issued |
Array
(
[id] => 4878253
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[patent_title] => 'REPETITIVE ERASE VERIFY TECHNIQUE FOR FLASH MEMORY DEVICES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/615710 | Repetitive erase verify technique for flash memory devices | Dec 21, 2006 | Issued |
Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/615422 | PG-gated data retention technique for reducing leakage in memory cells | Dec 21, 2006 | Issued |