
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5116810
[patent_doc_number] => 20070138524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-21
[patent_title] => 'Semiconductor memory device and methods thereof'
[patent_app_type] => utility
[patent_app_number] => 11/604823
[patent_app_country] => US
[patent_app_date] => 2006-11-28
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[pdf_file] => publications/A1/0138/20070138524.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/604823 | Semiconductor memory device and methods thereof | Nov 27, 2006 | Issued |
Array
(
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[patent_issue_date] => 2009-03-03
[patent_title] => 'Non-volatile memory implemented with low-voltages transistors and related system and method'
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[pdf_file] => patents/07/499/07499345.pdf
[firstpage_image] =>[orig_patent_app_number] => 11605209
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/605209 | Non-volatile memory implemented with low-voltages transistors and related system and method | Nov 26, 2006 | Issued |
Array
(
[id] => 4744540
[patent_doc_number] => 20080089142
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[patent_issue_date] => 2008-04-17
[patent_title] => 'Voltage generation circuit, flash memory device including the same and method for programming the flash memory device'
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[patent_app_number] => 11/604227
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/604227 | Voltage generation circuit, flash memory device including the same and method for programming the flash memory device | Nov 26, 2006 | Issued |
Array
(
[id] => 5105623
[patent_doc_number] => 20070064498
[patent_country] => US
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[patent_issue_date] => 2007-03-22
[patent_title] => 'Flash memory devices including multiple dummy cell array regions'
[patent_app_type] => utility
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[patent_app_country] => US
[patent_app_date] => 2006-11-21
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[firstpage_image] =>[orig_patent_app_number] => 11602645
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/602645 | Flash memory devices including multiple dummy cell array regions | Nov 20, 2006 | Issued |
Array
(
[id] => 422671
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[patent_title] => 'Low power chip select (CS) latency option'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/595766 | Low power chip select (CS) latency option | Nov 8, 2006 | Issued |
Array
(
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[patent_country] => US
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[patent_issue_date] => 2007-01-18
[patent_title] => 'Semiconductor memory device and semiconductor integrated circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/522904 | Semiconductor memory device and semiconductor integrated circuit | Sep 18, 2006 | Issued |
Array
(
[id] => 5607083
[patent_doc_number] => 20060268599
[patent_country] => US
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[patent_title] => 'Semiconductor memory device'
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[firstpage_image] =>[orig_patent_app_number] => 11500342
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/500342 | Semiconductor memory device | Aug 7, 2006 | Issued |
Array
(
[id] => 882966
[patent_doc_number] => 07355874
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-08
[patent_title] => 'Computer memory cards using flash EEprom integrated circuit chips and memory-controller systems'
[patent_app_type] => utility
[patent_app_number] => 11/461265
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/355/07355874.pdf
[firstpage_image] =>[orig_patent_app_number] => 11461265
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/461265 | Computer memory cards using flash EEprom integrated circuit chips and memory-controller systems | Jul 30, 2006 | Issued |
Array
(
[id] => 4686896
[patent_doc_number] => 20080031077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-07
[patent_title] => 'DAISY CHAINABLE MEMORY CHIP'
[patent_app_type] => utility
[patent_app_number] => 11/459994
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[patent_app_date] => 2006-07-26
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[pdf_file] => publications/A1/0031/20080031077.pdf
[firstpage_image] =>[orig_patent_app_number] => 11459994
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459994 | Daisy chainable memory chip | Jul 25, 2006 | Issued |
Array
(
[id] => 4659314
[patent_doc_number] => 20080028176
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'MEMORY SYSTEM HAVING SELF TIMED DAISY CHAINED MEMORY CHIPS'
[patent_app_type] => utility
[patent_app_number] => 11/459957
[patent_app_country] => US
[patent_app_date] => 2006-07-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459957 | Memory system having self timed daisy chained memory chips | Jul 25, 2006 | Issued |
Array
(
[id] => 4656268
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[patent_title] => 'DAISY CHAINED MEMORY SYSTEM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459956 | Daisy chained memory system | Jul 25, 2006 | Issued |
Array
(
[id] => 4656269
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Array
(
[id] => 5731493
[patent_doc_number] => 20060256607
[patent_country] => US
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[patent_issue_date] => 2006-11-16
[patent_title] => 'Ferroelectric memory devices having a plate line control circuit'
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Array
(
[id] => 5147245
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[patent_title] => 'METHOD FOR ACCESSING A MULTILEVEL NONVOLATILE MEMORY DEVICE OF THE FLASH NAND TYPE'
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[patent_app_number] => 11/458904
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Array
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[patent_title] => 'Reading method of a NAND-type memory device and NAND-type memory device'
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Array
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[patent_title] => 'Dynamic matching of signal path and reference path for sensing'
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Array
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[patent_title] => 'PURGE OPERATIONS FOR SOLID-STATE STORAGE DEVICES'
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/473465 | Using redundant memory for extra features | Jun 22, 2006 | Issued |