Search

Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 525853 [patent_doc_number] => 07193882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/319365 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 6372 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/193/07193882.pdf [firstpage_image] =>[orig_patent_app_number] => 11319365 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319365
Semiconductor memory device Dec 28, 2005 Issued
Array ( [id] => 5140398 [patent_doc_number] => 20070002614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'METHOD OF CONTROLLING PROGRAM OPERATION OF FLASH MEMORY DEVICE WITH REDUCED PROGRAM TIME' [patent_app_type] => utility [patent_app_number] => 11/306472 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5210 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20070002614.pdf [firstpage_image] =>[orig_patent_app_number] => 11306472 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306472
Method of controlling program operation of flash memory device with reduced program time Dec 28, 2005 Issued
Array ( [id] => 842178 [patent_doc_number] => 07391669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-24 [patent_title] => 'Semiconductor memory device and core layout thereof' [patent_app_type] => utility [patent_app_number] => 11/316878 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5007 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/391/07391669.pdf [firstpage_image] =>[orig_patent_app_number] => 11316878 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/316878
Semiconductor memory device and core layout thereof Dec 26, 2005 Issued
Array ( [id] => 7600854 [patent_doc_number] => 07385855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'Nonvolatile memory device having self reprogramming function' [patent_app_type] => utility [patent_app_number] => 11/306370 [patent_app_country] => US [patent_app_date] => 2005-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3137 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/385/07385855.pdf [firstpage_image] =>[orig_patent_app_number] => 11306370 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306370
Nonvolatile memory device having self reprogramming function Dec 25, 2005 Issued
Array ( [id] => 413297 [patent_doc_number] => 07283387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-16 [patent_title] => 'Phase change random access memory device having variable drive voltage circuit' [patent_app_type] => utility [patent_app_number] => 11/316256 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6939 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/283/07283387.pdf [firstpage_image] =>[orig_patent_app_number] => 11316256 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/316256
Phase change random access memory device having variable drive voltage circuit Dec 22, 2005 Issued
Array ( [id] => 478599 [patent_doc_number] => 07227776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Phase change random access memory (PRAM) device' [patent_app_type] => utility [patent_app_number] => 11/315130 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227776.pdf [firstpage_image] =>[orig_patent_app_number] => 11315130 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/315130
Phase change random access memory (PRAM) device Dec 22, 2005 Issued
Array ( [id] => 471340 [patent_doc_number] => 07233535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-19 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/315698 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6060 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/233/07233535.pdf [firstpage_image] =>[orig_patent_app_number] => 11315698 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/315698
Semiconductor memory device Dec 21, 2005 Issued
Array ( [id] => 5654287 [patent_doc_number] => 20060140022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Data output circuit, data output method, and semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/316848 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5813 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20060140022.pdf [firstpage_image] =>[orig_patent_app_number] => 11316848 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/316848
Data output circuit, data output method, and semiconductor memory device Dec 21, 2005 Issued
Array ( [id] => 921071 [patent_doc_number] => 07321511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-22 [patent_title] => 'Semiconductor device and method for controlling operation thereof' [patent_app_type] => utility [patent_app_number] => 11/316800 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 5750 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/321/07321511.pdf [firstpage_image] =>[orig_patent_app_number] => 11316800 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/316800
Semiconductor device and method for controlling operation thereof Dec 21, 2005 Issued
Array ( [id] => 5856416 [patent_doc_number] => 20060227630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Method and apparatus for applying bias to a storage device' [patent_app_type] => utility [patent_app_number] => 11/317082 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16510 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20060227630.pdf [firstpage_image] =>[orig_patent_app_number] => 11317082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317082
Method and apparatus for applying bias to a storage device Dec 20, 2005 Issued
Array ( [id] => 5118294 [patent_doc_number] => 20070140008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Independently programmable memory segments within an NMOS electrically erasable programmable read only memory array achieved by P-well separation and method therefor' [patent_app_type] => utility [patent_app_number] => 11/314504 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3867 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20070140008.pdf [firstpage_image] =>[orig_patent_app_number] => 11314504 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/314504
Independently programmable memory segments within an NMOS electrically erasable programmable read only memory array achieved by P-well separation and method therefor Dec 20, 2005 Abandoned
Array ( [id] => 467070 [patent_doc_number] => 07239574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Synchronous storage device and control method therefor' [patent_app_type] => utility [patent_app_number] => 11/317084 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8411 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/239/07239574.pdf [firstpage_image] =>[orig_patent_app_number] => 11317084 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317084
Synchronous storage device and control method therefor Dec 20, 2005 Issued
Array ( [id] => 5742180 [patent_doc_number] => 20060087905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'Voltage translator for multiple voltage operations' [patent_app_type] => utility [patent_app_number] => 11/297624 [patent_app_country] => US [patent_app_date] => 2005-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7678 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20060087905.pdf [firstpage_image] =>[orig_patent_app_number] => 11297624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/297624
Voltage translator for multiple voltage operations Dec 7, 2005 Issued
Array ( [id] => 490147 [patent_doc_number] => 07218561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-15 [patent_title] => 'Apparatus and method for semiconductor device repair with reduced number of programmable elements' [patent_app_type] => utility [patent_app_number] => 11/293946 [patent_app_country] => US [patent_app_date] => 2005-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5837 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/218/07218561.pdf [firstpage_image] =>[orig_patent_app_number] => 11293946 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/293946
Apparatus and method for semiconductor device repair with reduced number of programmable elements Dec 4, 2005 Issued
Array ( [id] => 5681918 [patent_doc_number] => 20060198188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'METHOD FOR OPERATING PAGE BUFFER OF NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/164714 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2974 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20060198188.pdf [firstpage_image] =>[orig_patent_app_number] => 11164714 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/164714
Method for operating page buffer of nonvolatile memory device Dec 1, 2005 Issued
Array ( [id] => 5782298 [patent_doc_number] => 20060203549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'PAGE BUFFER CIRCUIT OF FLASH MEMORY DEVICE WITH REDUCED CONSUMPTION POWER' [patent_app_type] => utility [patent_app_number] => 11/164678 [patent_app_country] => US [patent_app_date] => 2005-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3622 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20060203549.pdf [firstpage_image] =>[orig_patent_app_number] => 11164678 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/164678
Page buffer circuit of flash memory device with reduced consumption power Nov 30, 2005 Issued
Array ( [id] => 5140407 [patent_doc_number] => 20070002623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'PAGE BUFFER CIRCUIT WITH REDUCED SIZE, AND FLASH MEMORY DEVICE HAVING PAGE BUFFER AND PROGRAM OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/164612 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8634 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20070002623.pdf [firstpage_image] =>[orig_patent_app_number] => 11164612 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/164612
Page buffer circuit with reduced size, and flash memory device having page buffer and program operation method thereof Nov 29, 2005 Issued
Array ( [id] => 478673 [patent_doc_number] => 07227806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'High speed wordline decoder for driving a long wordline' [patent_app_type] => utility [patent_app_number] => 11/288428 [patent_app_country] => US [patent_app_date] => 2005-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2487 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227806.pdf [firstpage_image] =>[orig_patent_app_number] => 11288428 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/288428
High speed wordline decoder for driving a long wordline Nov 28, 2005 Issued
Array ( [id] => 5078146 [patent_doc_number] => 20070121370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'SRAM VOLTAGE CONTROL FOR IMPROVED OPERATIONAL MARGINS' [patent_app_type] => utility [patent_app_number] => 11/164556 [patent_app_country] => US [patent_app_date] => 2005-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6683 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20070121370.pdf [firstpage_image] =>[orig_patent_app_number] => 11164556 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/164556
SRAM voltage control for improved operational margins Nov 28, 2005 Issued
Array ( [id] => 5745701 [patent_doc_number] => 20060108625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Methods of programming non-volatile memory devices including transition metal oxide layer as data storage material layer and devices so operated' [patent_app_type] => utility [patent_app_number] => 11/282136 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3985 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20060108625.pdf [firstpage_image] =>[orig_patent_app_number] => 11282136 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282136
Methods of programming non-volatile memory devices including transition metal oxide layer as data storage material layer and devices so operated Nov 17, 2005 Issued
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