Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5797897 [patent_doc_number] => 20060034136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Using redundant memory for extra features' [patent_app_type] => utility [patent_app_number] => 10/918894 [patent_app_country] => US [patent_app_date] => 2004-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5137 [patent_no_of_claims] => 75 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20060034136.pdf [firstpage_image] =>[orig_patent_app_number] => 10918894 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/918894
Using redundant memory for extra features Aug 15, 2004 Issued
Array ( [id] => 610323 [patent_doc_number] => 07151709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-19 [patent_title] => 'Memory device and method having programmable address configurations' [patent_app_type] => utility [patent_app_number] => 10/920716 [patent_app_country] => US [patent_app_date] => 2004-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 5805 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/151/07151709.pdf [firstpage_image] =>[orig_patent_app_number] => 10920716 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920716
Memory device and method having programmable address configurations Aug 15, 2004 Issued
Array ( [id] => 644084 [patent_doc_number] => 07123504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Semiconductor integrated circuit device having static random access memory mounted thereon' [patent_app_type] => utility [patent_app_number] => 10/918642 [patent_app_country] => US [patent_app_date] => 2004-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5796 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 490 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/123/07123504.pdf [firstpage_image] =>[orig_patent_app_number] => 10918642 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/918642
Semiconductor integrated circuit device having static random access memory mounted thereon Aug 15, 2004 Issued
Array ( [id] => 7081840 [patent_doc_number] => 20050047220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/917308 [patent_app_country] => US [patent_app_date] => 2004-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11884 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20050047220.pdf [firstpage_image] =>[orig_patent_app_number] => 10917308 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/917308
Semiconductor memory device Aug 12, 2004 Issued
Array ( [id] => 7165135 [patent_doc_number] => 20050201168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/916524 [patent_app_country] => US [patent_app_date] => 2004-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20050201168.pdf [firstpage_image] =>[orig_patent_app_number] => 10916524 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/916524
Semiconductor memory device Aug 11, 2004 Issued
Array ( [id] => 674451 [patent_doc_number] => 07092298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Methods of erasing a non-volatile memory device having discrete charge trap sites' [patent_app_type] => utility [patent_app_number] => 10/916716 [patent_app_country] => US [patent_app_date] => 2004-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4503 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/092/07092298.pdf [firstpage_image] =>[orig_patent_app_number] => 10916716 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/916716
Methods of erasing a non-volatile memory device having discrete charge trap sites Aug 11, 2004 Issued
Array ( [id] => 5797843 [patent_doc_number] => 20060034122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Dynamic matching of signal path and reference path for sensing' [patent_app_type] => utility [patent_app_number] => 10/916413 [patent_app_country] => US [patent_app_date] => 2004-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3918 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20060034122.pdf [firstpage_image] =>[orig_patent_app_number] => 10916413 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/916413
Dynamic matching of signal path and reference path for sensing Aug 11, 2004 Issued
Array ( [id] => 959426 [patent_doc_number] => 06954374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-11 [patent_title] => 'Thin film magnetic memory device including memory cells having a magnetic tunnel junction' [patent_app_type] => utility [patent_app_number] => 10/915447 [patent_app_country] => US [patent_app_date] => 2004-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 60 [patent_no_of_words] => 23561 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/954/06954374.pdf [firstpage_image] =>[orig_patent_app_number] => 10915447 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/915447
Thin film magnetic memory device including memory cells having a magnetic tunnel junction Aug 10, 2004 Issued
Array ( [id] => 762145 [patent_doc_number] => 07016258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Semiconductor device having input/output sense amplifier for multiple sampling' [patent_app_type] => utility [patent_app_number] => 10/916179 [patent_app_country] => US [patent_app_date] => 2004-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5382 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/016/07016258.pdf [firstpage_image] =>[orig_patent_app_number] => 10916179 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/916179
Semiconductor device having input/output sense amplifier for multiple sampling Aug 10, 2004 Issued
Array ( [id] => 7237550 [patent_doc_number] => 20050270882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'High voltage generators having an integrated discharge path for use in non-volatile semiconductor memory devices' [patent_app_type] => utility [patent_app_number] => 10/915294 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20050270882.pdf [firstpage_image] =>[orig_patent_app_number] => 10915294 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/915294
High voltage generators having an integrated discharge path for use in non-volatile semiconductor memory devices Aug 9, 2004 Issued
Array ( [id] => 6970678 [patent_doc_number] => 20050036388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Method and apparatus for increasing data read speed in a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/915036 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1951 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20050036388.pdf [firstpage_image] =>[orig_patent_app_number] => 10915036 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/915036
Method and apparatus for increasing data read speed in a semiconductor memory device Aug 9, 2004 Issued
Array ( [id] => 776006 [patent_doc_number] => 07002838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 10/914084 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 7556 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/002/07002838.pdf [firstpage_image] =>[orig_patent_app_number] => 10914084 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/914084
Semiconductor storage device Aug 9, 2004 Issued
Array ( [id] => 858772 [patent_doc_number] => 07376008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'SCR matrix storage device' [patent_app_type] => utility [patent_app_number] => 10/913218 [patent_app_country] => US [patent_app_date] => 2004-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5173 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376008.pdf [firstpage_image] =>[orig_patent_app_number] => 10913218 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/913218
SCR matrix storage device Aug 5, 2004 Issued
Array ( [id] => 7009520 [patent_doc_number] => 20050063236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Sense amplifier' [patent_app_type] => utility [patent_app_number] => 10/913788 [patent_app_country] => US [patent_app_date] => 2004-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4950 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20050063236.pdf [firstpage_image] =>[orig_patent_app_number] => 10913788 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/913788
Sense amplifier with equalizer Aug 5, 2004 Issued
Array ( [id] => 7211404 [patent_doc_number] => 20050259469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'System and method for destructive purge of memory device' [patent_app_type] => utility [patent_app_number] => 10/912114 [patent_app_country] => US [patent_app_date] => 2004-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3239 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20050259469.pdf [firstpage_image] =>[orig_patent_app_number] => 10912114 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/912114
System and method for destructive purge of memory device Aug 5, 2004 Issued
Array ( [id] => 732697 [patent_doc_number] => 07042765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Memory bit line segment isolation' [patent_app_type] => utility [patent_app_number] => 10/912824 [patent_app_country] => US [patent_app_date] => 2004-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5145 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/042/07042765.pdf [firstpage_image] =>[orig_patent_app_number] => 10912824 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/912824
Memory bit line segment isolation Aug 5, 2004 Issued
Array ( [id] => 545160 [patent_doc_number] => 07173856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'Sense amplifier for a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 10/912520 [patent_app_country] => US [patent_app_date] => 2004-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3028 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/173/07173856.pdf [firstpage_image] =>[orig_patent_app_number] => 10912520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/912520
Sense amplifier for a non-volatile memory device Aug 4, 2004 Issued
Array ( [id] => 5879823 [patent_doc_number] => 20060028905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM' [patent_app_type] => utility [patent_app_number] => 10/910838 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5064 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20060028905.pdf [firstpage_image] =>[orig_patent_app_number] => 10910838 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/910838
Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM Aug 3, 2004 Issued
Array ( [id] => 704675 [patent_doc_number] => 07064981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'NAND string wordline delay reduction' [patent_app_type] => utility [patent_app_number] => 10/910882 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4995 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064981.pdf [firstpage_image] =>[orig_patent_app_number] => 10910882 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/910882
NAND string wordline delay reduction Aug 3, 2004 Issued
Array ( [id] => 7126238 [patent_doc_number] => 20050057982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Semiconductor memory and method for operating a semiconductor memory' [patent_app_type] => utility [patent_app_number] => 10/911230 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3866 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20050057982.pdf [firstpage_image] =>[orig_patent_app_number] => 10911230 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/911230
Semiconductor memory and method for operating a semiconductor memory Aug 3, 2004 Issued
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