
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 635951
[patent_doc_number] => 07130216
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[patent_issue_date] => 2006-10-31
[patent_title] => 'One-device non-volatile random access memory cell'
[patent_app_type] => utility
[patent_app_number] => 10/788230
[patent_app_country] => US
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Array
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[patent_issue_date] => 2004-12-21
[patent_title] => 'Low remanence flux concentrator for MRAM devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/785769 | Low remanence flux concentrator for MRAM devices | Feb 23, 2004 | Issued |
Array
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[patent_issue_date] => 2004-08-26
[patent_title] => 'Device and method for controlling solid-state memory system'
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Array
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[patent_issue_date] => 2006-02-14
[patent_title] => 'High speed wordline decoder for driving a long wordline'
[patent_app_type] => utility
[patent_app_number] => 10/777674
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/777674 | High speed wordline decoder for driving a long wordline | Feb 12, 2004 | Issued |
Array
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[patent_title] => 'Data input circuit and method for synchronous semiconductor memory device'
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Array
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[patent_title] => 'Current threshold detector'
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Array
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[patent_title] => 'Semiconductor memory having a flexible dual-bank architecture with improved row decoding'
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Array
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[patent_title] => 'Method and apparatus for reducing leakage current in a read only memory device using transistor bias'
[patent_app_type] => utility
[patent_app_number] => 10/764000
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764000 | Method and apparatus for reducing leakage current in a read only memory device using transistor bias | Jan 22, 2004 | Issued |
Array
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[id] => 997863
[patent_doc_number] => 06914837
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[patent_title] => 'DRAM memory with a shared sense amplifier structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/761242 | DRAM memory with a shared sense amplifier structure | Jan 21, 2004 | Issued |
Array
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[patent_title] => 'Methods and devices for preventing data stored in memory from being read out'
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Array
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[patent_title] => 'Concurrent refresh mode with distributed row address counters in an embedded DRAM'
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Array
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[patent_title] => 'Power-on reset circuit for erasing of split gate flash memory reference cells'
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Array
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Array
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Array
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Array
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