Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1036120 [patent_doc_number] => 06876568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Timing adjusting circuit and semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/636544 [patent_app_country] => US [patent_app_date] => 2003-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 5210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/876/06876568.pdf [firstpage_image] =>[orig_patent_app_number] => 10636544 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/636544
Timing adjusting circuit and semiconductor memory device Aug 7, 2003 Issued
Array ( [id] => 7131932 [patent_doc_number] => 20040042325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Static semiconductor memory device and method of controlling the same' [patent_app_type] => new [patent_app_number] => 10/636543 [patent_app_country] => US [patent_app_date] => 2003-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4292 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20040042325.pdf [firstpage_image] =>[orig_patent_app_number] => 10636543 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/636543
Static semiconductor memory device and method of controlling the same Aug 7, 2003 Issued
Array ( [id] => 7374837 [patent_doc_number] => 20040027897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Bit line pre-charge circuit of semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/633562 [patent_app_country] => US [patent_app_date] => 2003-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7909 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027897.pdf [firstpage_image] =>[orig_patent_app_number] => 10633562 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/633562
Bit line pre-charge circuit of semiconductor memory device Aug 4, 2003 Issued
Array ( [id] => 1091249 [patent_doc_number] => 06829182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Device for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines' [patent_app_type] => B2 [patent_app_number] => 10/633956 [patent_app_country] => US [patent_app_date] => 2003-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3193 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/829/06829182.pdf [firstpage_image] =>[orig_patent_app_number] => 10633956 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/633956
Device for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines Aug 3, 2003 Issued
Array ( [id] => 736694 [patent_doc_number] => 07038935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => '2-terminal trapped charge memory device with voltage switchable multi-level resistance' [patent_app_type] => utility [patent_app_number] => 10/634636 [patent_app_country] => US [patent_app_date] => 2003-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6262 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038935.pdf [firstpage_image] =>[orig_patent_app_number] => 10634636 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/634636
2-terminal trapped charge memory device with voltage switchable multi-level resistance Aug 3, 2003 Issued
Array ( [id] => 7131930 [patent_doc_number] => 20040042324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Flash memory for reducing peak current' [patent_app_type] => new [patent_app_number] => 10/633848 [patent_app_country] => US [patent_app_date] => 2003-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3949 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20040042324.pdf [firstpage_image] =>[orig_patent_app_number] => 10633848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/633848
Flash memory for reducing peak current Aug 3, 2003 Issued
Array ( [id] => 7374652 [patent_doc_number] => 20040027863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Semiconductor memory device with shift redundancy circuits' [patent_app_type] => new [patent_app_number] => 10/631766 [patent_app_country] => US [patent_app_date] => 2003-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8199 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027863.pdf [firstpage_image] =>[orig_patent_app_number] => 10631766 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631766
Semiconductor memory device with shift redundancy circuits Jul 31, 2003 Issued
Array ( [id] => 1104554 [patent_doc_number] => 06816414 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-09 [patent_title] => 'Nonvolatile memory and method of making same' [patent_app_type] => B1 [patent_app_number] => 10/631142 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3178 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/816/06816414.pdf [firstpage_image] =>[orig_patent_app_number] => 10631142 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631142
Nonvolatile memory and method of making same Jul 30, 2003 Issued
Array ( [id] => 714029 [patent_doc_number] => 07057960 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-06 [patent_title] => 'Method and architecture for reducing the power consumption for memory devices in refresh operations' [patent_app_type] => utility [patent_app_number] => 10/629667 [patent_app_country] => US [patent_app_date] => 2003-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4655 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/057/07057960.pdf [firstpage_image] =>[orig_patent_app_number] => 10629667 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/629667
Method and architecture for reducing the power consumption for memory devices in refresh operations Jul 28, 2003 Issued
Array ( [id] => 7150686 [patent_doc_number] => 20050024943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Detecting over programmed memory after further programming' [patent_app_type] => utility [patent_app_number] => 10/628962 [patent_app_country] => US [patent_app_date] => 2003-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13993 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20050024943.pdf [firstpage_image] =>[orig_patent_app_number] => 10628962 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628962
Detecting over programmed memory after further programming Jul 28, 2003 Issued
Array ( [id] => 7346717 [patent_doc_number] => 20040047207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Reading circuit, reference circuit, and semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/630568 [patent_app_country] => US [patent_app_date] => 2003-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 22542 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20040047207.pdf [firstpage_image] =>[orig_patent_app_number] => 10630568 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/630568
Reading circuit, reference circuit, and semiconductor memory device Jul 28, 2003 Issued
Array ( [id] => 7614417 [patent_doc_number] => 06898113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Magnetic memory device with reference cell for data reading' [patent_app_type] => utility [patent_app_number] => 10/628463 [patent_app_country] => US [patent_app_date] => 2003-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 15133 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/898/06898113.pdf [firstpage_image] =>[orig_patent_app_number] => 10628463 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628463
Magnetic memory device with reference cell for data reading Jul 28, 2003 Issued
Array ( [id] => 7150681 [patent_doc_number] => 20050024939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Detecting over programmed memory' [patent_app_type] => utility [patent_app_number] => 10/629068 [patent_app_country] => US [patent_app_date] => 2003-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14097 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20050024939.pdf [firstpage_image] =>[orig_patent_app_number] => 10629068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/629068
Detecting over programmed memory Jul 28, 2003 Issued
Array ( [id] => 7392566 [patent_doc_number] => 20040017707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems' [patent_app_type] => new [patent_app_number] => 10/628746 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6700 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20040017707.pdf [firstpage_image] =>[orig_patent_app_number] => 10628746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628746
Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems Jul 27, 2003 Issued
Array ( [id] => 568565 [patent_doc_number] => 07161820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-09 [patent_title] => 'Memory module and memory system having an expandable signal transmission, increased signal transmission and/or high capacity memory' [patent_app_type] => utility [patent_app_number] => 10/628517 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 46 [patent_no_of_words] => 11237 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/161/07161820.pdf [firstpage_image] =>[orig_patent_app_number] => 10628517 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628517
Memory module and memory system having an expandable signal transmission, increased signal transmission and/or high capacity memory Jul 27, 2003 Issued
Array ( [id] => 973985 [patent_doc_number] => 06937532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Semiconductor memory' [patent_app_type] => utility [patent_app_number] => 10/628168 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13347 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937532.pdf [firstpage_image] =>[orig_patent_app_number] => 10628168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628168
Semiconductor memory Jul 27, 2003 Issued
Array ( [id] => 1064815 [patent_doc_number] => 06850454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Semiconductor memory device with reduced current consumption during standby state' [patent_app_type] => utility [patent_app_number] => 10/626643 [patent_app_country] => US [patent_app_date] => 2003-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 19902 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850454.pdf [firstpage_image] =>[orig_patent_app_number] => 10626643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/626643
Semiconductor memory device with reduced current consumption during standby state Jul 24, 2003 Issued
Array ( [id] => 7146421 [patent_doc_number] => 20040170076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Thin film magnetic memory device suppressing influence of magnetic field noise from power supply wiring' [patent_app_type] => new [patent_app_number] => 10/625644 [patent_app_country] => US [patent_app_date] => 2003-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10550 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20040170076.pdf [firstpage_image] =>[orig_patent_app_number] => 10625644 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/625644
Thin film magnetic memory device suppressing influence of magnetic field noise from power supply wiring Jul 23, 2003 Issued
Array ( [id] => 936200 [patent_doc_number] => 06975550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Array transistor amplification method and apparatus for dynamic random access memory' [patent_app_type] => utility [patent_app_number] => 10/625962 [patent_app_country] => US [patent_app_date] => 2003-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7480 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975550.pdf [firstpage_image] =>[orig_patent_app_number] => 10625962 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/625962
Array transistor amplification method and apparatus for dynamic random access memory Jul 23, 2003 Issued
Array ( [id] => 1084401 [patent_doc_number] => 06834015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Semiconductor memory device for reducing data accessing time' [patent_app_type] => B2 [patent_app_number] => 10/621246 [patent_app_country] => US [patent_app_date] => 2003-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3475 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/834/06834015.pdf [firstpage_image] =>[orig_patent_app_number] => 10621246 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/621246
Semiconductor memory device for reducing data accessing time Jul 14, 2003 Issued
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