Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7087724 [patent_doc_number] => 20050007836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'DATA STROBE SYNCHRONIZATION CIRCUIT AND METHOD FOR DOUBLE DATA RATE, MULTI-BIT WRITES' [patent_app_type] => utility [patent_app_number] => 10/617246 [patent_app_country] => US [patent_app_date] => 2003-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4450 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20050007836.pdf [firstpage_image] =>[orig_patent_app_number] => 10617246 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/617246
Data strobe synchronization circuit and method for double data rate, multi-bit writes Jul 8, 2003 Issued
Array ( [id] => 936190 [patent_doc_number] => 06975540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Semiconductor memory device for differential data amplification and method therefor' [patent_app_type] => utility [patent_app_number] => 10/614066 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12782 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975540.pdf [firstpage_image] =>[orig_patent_app_number] => 10614066 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/614066
Semiconductor memory device for differential data amplification and method therefor Jul 7, 2003 Issued
Array ( [id] => 1156074 [patent_doc_number] => 06775186 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-10 [patent_title] => 'Low voltage sensing circuit for non-volatile memory device' [patent_app_type] => B1 [patent_app_number] => 10/613845 [patent_app_country] => US [patent_app_date] => 2003-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/775/06775186.pdf [firstpage_image] =>[orig_patent_app_number] => 10613845 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/613845
Low voltage sensing circuit for non-volatile memory device Jul 2, 2003 Issued
Array ( [id] => 557200 [patent_doc_number] => 07170801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-30 [patent_title] => 'Method for replacing defects in a memory and apparatus thereof' [patent_app_type] => utility [patent_app_number] => 10/612300 [patent_app_country] => US [patent_app_date] => 2003-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4044 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/170/07170801.pdf [firstpage_image] =>[orig_patent_app_number] => 10612300 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/612300
Method for replacing defects in a memory and apparatus thereof Jul 2, 2003 Issued
Array ( [id] => 1082230 [patent_doc_number] => 06836439 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Ferroelectric memory device comprising redundancy circuit' [patent_app_type] => B1 [patent_app_number] => 10/608543 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 4284 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836439.pdf [firstpage_image] =>[orig_patent_app_number] => 10608543 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/608543
Ferroelectric memory device comprising redundancy circuit Jun 29, 2003 Issued
Array ( [id] => 7415747 [patent_doc_number] => 20040264289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Timer lockout circuit for synchronous applications' [patent_app_type] => new [patent_app_number] => 10/604168 [patent_app_country] => US [patent_app_date] => 2003-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2757 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20040264289.pdf [firstpage_image] =>[orig_patent_app_number] => 10604168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/604168
Timer lockout circuit for synchronous applications Jun 28, 2003 Issued
Array ( [id] => 7386169 [patent_doc_number] => 20040037122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'ROM memory device having repair function for defective cell and method for repairing the defective cell' [patent_app_type] => new [patent_app_number] => 10/601560 [patent_app_country] => US [patent_app_date] => 2003-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5385 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20040037122.pdf [firstpage_image] =>[orig_patent_app_number] => 10601560 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/601560
ROM memory device having repair function for defective cell and method for repairing the defective cell Jun 23, 2003 Issued
Array ( [id] => 7360327 [patent_doc_number] => 20040004868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Sense amplifier' [patent_app_type] => new [patent_app_number] => 10/601868 [patent_app_country] => US [patent_app_date] => 2003-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2009 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004868.pdf [firstpage_image] =>[orig_patent_app_number] => 10601868 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/601868
Sense amplifier Jun 23, 2003 Issued
Array ( [id] => 7244189 [patent_doc_number] => 20040257886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Redundancy circuit for memory array and method for disabling non-redundant wordlines and for enabling redundant wordlines' [patent_app_type] => new [patent_app_number] => 10/600064 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4253 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20040257886.pdf [firstpage_image] =>[orig_patent_app_number] => 10600064 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600064
Redundancy circuit for memory array and method for disabling non-redundant wordlines and for enabling redundant wordlines Jun 19, 2003 Issued
Array ( [id] => 1140210 [patent_doc_number] => 06785179 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Charge sharing between bit lines within a memory circuit to increase recharge speed' [patent_app_type] => B1 [patent_app_number] => 10/464848 [patent_app_country] => US [patent_app_date] => 2003-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3345 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785179.pdf [firstpage_image] =>[orig_patent_app_number] => 10464848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/464848
Charge sharing between bit lines within a memory circuit to increase recharge speed Jun 18, 2003 Issued
Array ( [id] => 7963135 [patent_doc_number] => 06680862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-20 [patent_title] => 'Memory device having wide margin of data reading operation, for storing data by change in electric resistance value' [patent_app_type] => B2 [patent_app_number] => 10/446872 [patent_app_country] => US [patent_app_date] => 2003-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 15609 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680862.pdf [firstpage_image] =>[orig_patent_app_number] => 10446872 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/446872
Memory device having wide margin of data reading operation, for storing data by change in electric resistance value May 28, 2003 Issued
Array ( [id] => 1108146 [patent_doc_number] => 06813181 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'Circuit configuration for a current switch of a bit/word line of a MRAM device' [patent_app_type] => B1 [patent_app_number] => 10/445550 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4192 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813181.pdf [firstpage_image] =>[orig_patent_app_number] => 10445550 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445550
Circuit configuration for a current switch of a bit/word line of a MRAM device May 26, 2003 Issued
Array ( [id] => 6724153 [patent_doc_number] => 20030206465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Integrated memory with a configuration of non-volatile memory cells and method for fabricating and for operating the integrated memory' [patent_app_type] => new [patent_app_number] => 10/444546 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3866 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20030206465.pdf [firstpage_image] =>[orig_patent_app_number] => 10444546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/444546
Integrated memory with a configuration of non-volatile memory cells and method for fabricating and for operating the integrated memory May 22, 2003 Issued
Array ( [id] => 980443 [patent_doc_number] => 06930938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Semiconductor memory device having test mode' [patent_app_type] => utility [patent_app_number] => 10/442974 [patent_app_country] => US [patent_app_date] => 2003-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7148 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930938.pdf [firstpage_image] =>[orig_patent_app_number] => 10442974 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442974
Semiconductor memory device having test mode May 21, 2003 Issued
Array ( [id] => 7360439 [patent_doc_number] => 20040004890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Semiconductor memory device and method of controlling the same' [patent_app_type] => new [patent_app_number] => 10/443645 [patent_app_country] => US [patent_app_date] => 2003-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11834 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004890.pdf [firstpage_image] =>[orig_patent_app_number] => 10443645 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/443645
Semiconductor memory device and method of controlling the same May 21, 2003 Issued
Array ( [id] => 758672 [patent_doc_number] => 07020009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Bistable magnetic device using soft magnetic intermediary material' [patent_app_type] => utility [patent_app_number] => 10/437852 [patent_app_country] => US [patent_app_date] => 2003-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 9287 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/020/07020009.pdf [firstpage_image] =>[orig_patent_app_number] => 10437852 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/437852
Bistable magnetic device using soft magnetic intermediary material May 13, 2003 Issued
Array ( [id] => 1057922 [patent_doc_number] => 06856536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Non-volatile memory with a single transistor and resistive memory element' [patent_app_type] => utility [patent_app_number] => 10/249848 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6662 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/856/06856536.pdf [firstpage_image] =>[orig_patent_app_number] => 10249848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249848
Non-volatile memory with a single transistor and resistive memory element May 11, 2003 Issued
Array ( [id] => 1054729 [patent_doc_number] => 06859382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Memory array of a non-volatile ram' [patent_app_type] => utility [patent_app_number] => 10/249846 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6817 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859382.pdf [firstpage_image] =>[orig_patent_app_number] => 10249846 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249846
Memory array of a non-volatile ram May 11, 2003 Issued
Array ( [id] => 1180143 [patent_doc_number] => 06751117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Single ended row select for a MRAM device' [patent_app_type] => B2 [patent_app_number] => 10/435029 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2377 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751117.pdf [firstpage_image] =>[orig_patent_app_number] => 10435029 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/435029
Single ended row select for a MRAM device May 11, 2003 Issued
Array ( [id] => 1074590 [patent_doc_number] => 06839258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Folded DRAM CAM cell' [patent_app_type] => utility [patent_app_number] => 10/435049 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2766 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839258.pdf [firstpage_image] =>[orig_patent_app_number] => 10435049 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/435049
Folded DRAM CAM cell May 11, 2003 Issued
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