Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 936192 [patent_doc_number] => 06975542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'NAND flash memory with improved read and verification threshold uniformity' [patent_app_type] => utility [patent_app_number] => 10/431862 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3301 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975542.pdf [firstpage_image] =>[orig_patent_app_number] => 10431862 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/431862
NAND flash memory with improved read and verification threshold uniformity May 7, 2003 Issued
Array ( [id] => 1019835 [patent_doc_number] => 06891758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Position based erase verification levels in a flash memory device' [patent_app_type] => utility [patent_app_number] => 10/431749 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2234 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891758.pdf [firstpage_image] =>[orig_patent_app_number] => 10431749 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/431749
Position based erase verification levels in a flash memory device May 7, 2003 Issued
Array ( [id] => 6622190 [patent_doc_number] => 20030210566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/430050 [patent_app_country] => US [patent_app_date] => 2003-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9456 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20030210566.pdf [firstpage_image] =>[orig_patent_app_number] => 10430050 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/430050
Semiconductor memory device May 5, 2003 Issued
Array ( [id] => 1140135 [patent_doc_number] => 06785160 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Method of providing stability of a magnetic memory cell' [patent_app_type] => B1 [patent_app_number] => 10/425352 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785160.pdf [firstpage_image] =>[orig_patent_app_number] => 10425352 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/425352
Method of providing stability of a magnetic memory cell Apr 28, 2003 Issued
Array ( [id] => 6622446 [patent_doc_number] => 20030210591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Magnetic memory device and magnetic substrate' [patent_app_type] => new [patent_app_number] => 10/424086 [patent_app_country] => US [patent_app_date] => 2003-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 31638 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20030210591.pdf [firstpage_image] =>[orig_patent_app_number] => 10424086 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/424086
Magnetic memory device and magnetic substrate Apr 27, 2003 Issued
Array ( [id] => 7263497 [patent_doc_number] => 20040151046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'SENSE AMPLIFIER WITH ADAPTIVE REFERENCE GENERATION' [patent_app_type] => new [patent_app_number] => 10/423346 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1712 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20040151046.pdf [firstpage_image] =>[orig_patent_app_number] => 10423346 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/423346
Sense amplifier with adaptive reference generation Apr 24, 2003 Issued
Array ( [id] => 7610481 [patent_doc_number] => 06842377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Nonvolatile semiconductor memory device with first and second read modes' [patent_app_type] => utility [patent_app_number] => 10/412646 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 69 [patent_no_of_words] => 18055 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842377.pdf [firstpage_image] =>[orig_patent_app_number] => 10412646 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/412646
Nonvolatile semiconductor memory device with first and second read modes Apr 10, 2003 Issued
Array ( [id] => 1042102 [patent_doc_number] => 06870754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 10/405352 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10703 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870754.pdf [firstpage_image] =>[orig_patent_app_number] => 10405352 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405352
Ferroelectric memory Apr 2, 2003 Issued
Array ( [id] => 7454632 [patent_doc_number] => 20040052145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'System for controlling the stand-by to active and active to stand-by transitions of a VCC regulator for a flash memory device' [patent_app_type] => new [patent_app_number] => 10/407646 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1872 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20040052145.pdf [firstpage_image] =>[orig_patent_app_number] => 10407646 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/407646
System for controlling the stand-by to active and active to stand-by transitions of a VCC regulator for a flash memory device Apr 2, 2003 Issued
Array ( [id] => 6663067 [patent_doc_number] => 20030202393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Semiconductor memory device and control method thereof' [patent_app_type] => new [patent_app_number] => 10/404153 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15972 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20030202393.pdf [firstpage_image] =>[orig_patent_app_number] => 10404153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/404153
Semiconductor memory device and control method thereof Apr 1, 2003 Issued
Array ( [id] => 6663066 [patent_doc_number] => 20030202392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Nonvolatile memory and method of programming the same memory' [patent_app_type] => new [patent_app_number] => 10/404101 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14387 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20030202392.pdf [firstpage_image] =>[orig_patent_app_number] => 10404101 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/404101
Nonvolatile memory and method of programming the same memory Apr 1, 2003 Issued
Array ( [id] => 1032596 [patent_doc_number] => 06879505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Word line arrangement having multi-layer word line segments for three-dimensional memory array' [patent_app_type] => utility [patent_app_number] => 10/403844 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 11418 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/879/06879505.pdf [firstpage_image] =>[orig_patent_app_number] => 10403844 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/403844
Word line arrangement having multi-layer word line segments for three-dimensional memory array Mar 30, 2003 Issued
Array ( [id] => 1130942 [patent_doc_number] => 06791876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Thin-film magnetic memory device suppressing parasitic capacitance applied to data line or the like' [patent_app_type] => B2 [patent_app_number] => 10/397352 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 13299 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791876.pdf [firstpage_image] =>[orig_patent_app_number] => 10397352 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397352
Thin-film magnetic memory device suppressing parasitic capacitance applied to data line or the like Mar 26, 2003 Issued
Array ( [id] => 7338171 [patent_doc_number] => 20040190341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'ALTERNATING APPLICATION OF PULSES ON TWO SIDES OF A CELL' [patent_app_type] => new [patent_app_number] => 10/394254 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2985 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190341.pdf [firstpage_image] =>[orig_patent_app_number] => 10394254 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/394254
Alternating application of pulses on two sides of a cell Mar 23, 2003 Issued
Array ( [id] => 1061344 [patent_doc_number] => 06853601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Device and method for repairing a memory array by storing each bit in multiple memory cells in the array' [patent_app_type] => utility [patent_app_number] => 10/395478 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8216 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853601.pdf [firstpage_image] =>[orig_patent_app_number] => 10395478 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/395478
Device and method for repairing a memory array by storing each bit in multiple memory cells in the array Mar 23, 2003 Issued
Array ( [id] => 1163825 [patent_doc_number] => 06765835 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Stabilizing and reducing noise apparatus and methods in MRAM sensing operations' [patent_app_type] => B1 [patent_app_number] => 10/393750 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765835.pdf [firstpage_image] =>[orig_patent_app_number] => 10393750 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393750
Stabilizing and reducing noise apparatus and methods in MRAM sensing operations Mar 20, 2003 Issued
Array ( [id] => 6808135 [patent_doc_number] => 20030198074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Mask ROM' [patent_app_type] => new [patent_app_number] => 10/386554 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2476 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20030198074.pdf [firstpage_image] =>[orig_patent_app_number] => 10386554 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/386554
Mask ROM Mar 12, 2003 Issued
Array ( [id] => 7380172 [patent_doc_number] => 20040179419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Multi-frequency synchronizing clock signal generator' [patent_app_type] => new [patent_app_number] => 10/388052 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7913 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20040179419.pdf [firstpage_image] =>[orig_patent_app_number] => 10388052 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388052
Multi-frequency synchronizing clock signal generator Mar 11, 2003 Issued
Array ( [id] => 1067443 [patent_doc_number] => 06847582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'Low skew clock input buffer and method' [patent_app_type] => utility [patent_app_number] => 10/387150 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5799 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847582.pdf [firstpage_image] =>[orig_patent_app_number] => 10387150 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387150
Low skew clock input buffer and method Mar 10, 2003 Issued
Array ( [id] => 1064806 [patent_doc_number] => 06850448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Temperature-dependent refresh cycle for DRAM' [patent_app_type] => utility [patent_app_number] => 10/386148 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1790 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850448.pdf [firstpage_image] =>[orig_patent_app_number] => 10386148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/386148
Temperature-dependent refresh cycle for DRAM Mar 10, 2003 Issued
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