Son Luu Mai

Array ( [id] => 7398245 [patent_doc_number] => 20040174733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Structure and System-on-Chip Integration of a Two-Transistor and Two-Capacitor Memory Cell for Trench Technology' [patent_app_type] => new [patent_app_number] => 10/248954 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3228 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20040174733.pdf [firstpage_image] =>[orig_patent_app_number] => 10248954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1183157 [patent_doc_number] => 06744658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Semiconductor memory device capable of holding write data for long time' [patent_app_type] => B2 [patent_app_number] => 10/378852 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 12302 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744658.pdf [firstpage_image] =>[orig_patent_app_number] => 10378852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795660 [patent_doc_number] => 20030174533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Dynamic random access memory (DRAM) and method of operating the same' [patent_app_type] => new [patent_app_number] => 10/377955 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174533.pdf [firstpage_image] =>[orig_patent_app_number] => 10377955 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1288113 [patent_doc_number] => 06643163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/376237 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 53 [patent_no_of_words] => 13471 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643163.pdf [firstpage_image] =>[orig_patent_app_number] => 10376237 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 754366 [patent_doc_number] => 07023757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/373042 [patent_app_country] => US [patent_app_date] => 2003-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5072 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/023/07023757.pdf [firstpage_image] =>[orig_patent_app_number] => 10373042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795673 [patent_doc_number] => 20030174546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'DATA PATH DECODING TECHNIQUE FOR AN EMBEDDED MEMORY ARRAY' [patent_app_type] => new [patent_app_number] => 10/374562 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3642 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174546.pdf [firstpage_image] =>[orig_patent_app_number] => 10374562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795686 [patent_doc_number] => 20030174559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Methods of storing a temperature in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit and memory integrated circuit' [patent_app_type] => new [patent_app_number] => 10/373498 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6374 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174559.pdf [firstpage_image] =>[orig_patent_app_number] => 10373498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795674 [patent_doc_number] => 20030174547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Memory device which can change control by chip select signal' [patent_app_type] => new [patent_app_number] => 10/365452 [patent_app_country] => US [patent_app_date] => 2003-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7420 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174547.pdf [firstpage_image] =>[orig_patent_app_number] => 10365452 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1185362 [patent_doc_number] => 06738302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Optimized read data amplifier and method for operating the same in conjunction with integrated circuit devices incorporating memory arrays' [patent_app_type] => B1 [patent_app_number] => 10/360146 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3872 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738302.pdf [firstpage_image] =>[orig_patent_app_number] => 10360146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6820738 [patent_doc_number] => 20030218899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Ferroelectric memory devices having a plate line control circuit and methods for operating the same' [patent_app_type] => new [patent_app_number] => 10/358550 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7009 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20030218899.pdf [firstpage_image] =>[orig_patent_app_number] => 10358550 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7263484 [patent_doc_number] => 20040151034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Method and circuit for operating a memory cell using a single charge pump' [patent_app_type] => new [patent_app_number] => 10/354050 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4251 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20040151034.pdf [firstpage_image] =>[orig_patent_app_number] => 10354050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1122884 [patent_doc_number] => 06798703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Semiconductor memory device having improved replacement efficiency of defective word lines by redundancy word lines' [patent_app_type] => B2 [patent_app_number] => 10/348752 [patent_app_country] => US [patent_app_date] => 2003-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4282 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798703.pdf [firstpage_image] =>[orig_patent_app_number] => 10348752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1288423 [patent_doc_number] => 06643218 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Precharge control signal generator, and semiconductor memory device using the same' [patent_app_type] => B1 [patent_app_number] => 10/347276 [patent_app_country] => US [patent_app_date] => 2003-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7032 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643218.pdf [firstpage_image] =>[orig_patent_app_number] => 10347276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6696902 [patent_doc_number] => 20030109096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Non volatile memory and data processor' [patent_app_type] => new [patent_app_number] => 10/345945 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10693 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20030109096.pdf [firstpage_image] =>[orig_patent_app_number] => 10345945 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 430060 [patent_doc_number] => 07269075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Method and apparatus for simultaneous differential data sensing and capture in a high speed memory' [patent_app_type] => utility [patent_app_number] => 10/337346 [patent_app_country] => US [patent_app_date] => 2003-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2577 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/269/07269075.pdf [firstpage_image] =>[orig_patent_app_number] => 10337346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7331114 [patent_doc_number] => 20040130936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Spin-transfer multilayer stack containing magnetic layers with resettable magnetization' [patent_app_type] => new [patent_app_number] => 10/338148 [patent_app_country] => US [patent_app_date] => 2003-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14335 [patent_no_of_claims] => 80 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20040130936.pdf [firstpage_image] =>[orig_patent_app_number] => 10338148 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6705232 [patent_doc_number] => 20030151966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'High speed DRAM architecture with uniform access latency' [patent_app_type] => new [patent_app_number] => 10/336850 [patent_app_country] => US [patent_app_date] => 2003-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7727 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20030151966.pdf [firstpage_image] =>[orig_patent_app_number] => 10336850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6850365 [patent_doc_number] => 20030142567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Method and apparatus for accelerating signal equalization between a pair of signal lines' [patent_app_type] => new [patent_app_number] => 10/336851 [patent_app_country] => US [patent_app_date] => 2003-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3221 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20030142567.pdf [firstpage_image] =>[orig_patent_app_number] => 10336851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7360397 [patent_doc_number] => 20040004883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/335948 [patent_app_country] => US [patent_app_date] => 2003-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8956 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004883.pdf [firstpage_image] =>[orig_patent_app_number] => 10335948 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6768933 [patent_doc_number] => 20030214873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Decoding apparatus for semiconductor memory device, and enable method therefore' [patent_app_type] => new [patent_app_number] => 10/331746 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3413 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20030214873.pdf [firstpage_image] =>[orig_patent_app_number] => 10331746 [rel_patent_id] =>[rel_patent_doc_number] =>)