Son Luu Mai

Array ( [id] => 1130942 [patent_doc_number] => 06791876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Thin-film magnetic memory device suppressing parasitic capacitance applied to data line or the like' [patent_app_type] => B2 [patent_app_number] => 10/397352 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 13299 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791876.pdf [firstpage_image] =>[orig_patent_app_number] => 10397352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1061344 [patent_doc_number] => 06853601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Device and method for repairing a memory array by storing each bit in multiple memory cells in the array' [patent_app_type] => utility [patent_app_number] => 10/395478 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8216 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853601.pdf [firstpage_image] =>[orig_patent_app_number] => 10395478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7338171 [patent_doc_number] => 20040190341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'ALTERNATING APPLICATION OF PULSES ON TWO SIDES OF A CELL' [patent_app_type] => new [patent_app_number] => 10/394254 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2985 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190341.pdf [firstpage_image] =>[orig_patent_app_number] => 10394254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1163825 [patent_doc_number] => 06765835 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Stabilizing and reducing noise apparatus and methods in MRAM sensing operations' [patent_app_type] => B1 [patent_app_number] => 10/393750 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765835.pdf [firstpage_image] =>[orig_patent_app_number] => 10393750 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6808135 [patent_doc_number] => 20030198074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Mask ROM' [patent_app_type] => new [patent_app_number] => 10/386554 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2476 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20030198074.pdf [firstpage_image] =>[orig_patent_app_number] => 10386554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7380172 [patent_doc_number] => 20040179419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Multi-frequency synchronizing clock signal generator' [patent_app_type] => new [patent_app_number] => 10/388052 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7913 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20040179419.pdf [firstpage_image] =>[orig_patent_app_number] => 10388052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1064806 [patent_doc_number] => 06850448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Temperature-dependent refresh cycle for DRAM' [patent_app_type] => utility [patent_app_number] => 10/386148 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1790 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850448.pdf [firstpage_image] =>[orig_patent_app_number] => 10386148 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1067443 [patent_doc_number] => 06847582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'Low skew clock input buffer and method' [patent_app_type] => utility [patent_app_number] => 10/387150 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5799 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847582.pdf [firstpage_image] =>[orig_patent_app_number] => 10387150 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1183157 [patent_doc_number] => 06744658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Semiconductor memory device capable of holding write data for long time' [patent_app_type] => B2 [patent_app_number] => 10/378852 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 12302 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744658.pdf [firstpage_image] =>[orig_patent_app_number] => 10378852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7398245 [patent_doc_number] => 20040174733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Structure and System-on-Chip Integration of a Two-Transistor and Two-Capacitor Memory Cell for Trench Technology' [patent_app_type] => new [patent_app_number] => 10/248954 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3228 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20040174733.pdf [firstpage_image] =>[orig_patent_app_number] => 10248954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795660 [patent_doc_number] => 20030174533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Dynamic random access memory (DRAM) and method of operating the same' [patent_app_type] => new [patent_app_number] => 10/377955 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174533.pdf [firstpage_image] =>[orig_patent_app_number] => 10377955 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1288113 [patent_doc_number] => 06643163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/376237 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 53 [patent_no_of_words] => 13471 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643163.pdf [firstpage_image] =>[orig_patent_app_number] => 10376237 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 754366 [patent_doc_number] => 07023757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/373042 [patent_app_country] => US [patent_app_date] => 2003-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5072 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/023/07023757.pdf [firstpage_image] =>[orig_patent_app_number] => 10373042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795673 [patent_doc_number] => 20030174546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'DATA PATH DECODING TECHNIQUE FOR AN EMBEDDED MEMORY ARRAY' [patent_app_type] => new [patent_app_number] => 10/374562 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3642 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174546.pdf [firstpage_image] =>[orig_patent_app_number] => 10374562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795686 [patent_doc_number] => 20030174559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Methods of storing a temperature in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit and memory integrated circuit' [patent_app_type] => new [patent_app_number] => 10/373498 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6374 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174559.pdf [firstpage_image] =>[orig_patent_app_number] => 10373498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795674 [patent_doc_number] => 20030174547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Memory device which can change control by chip select signal' [patent_app_type] => new [patent_app_number] => 10/365452 [patent_app_country] => US [patent_app_date] => 2003-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7420 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174547.pdf [firstpage_image] =>[orig_patent_app_number] => 10365452 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1185362 [patent_doc_number] => 06738302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Optimized read data amplifier and method for operating the same in conjunction with integrated circuit devices incorporating memory arrays' [patent_app_type] => B1 [patent_app_number] => 10/360146 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3872 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738302.pdf [firstpage_image] =>[orig_patent_app_number] => 10360146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6820738 [patent_doc_number] => 20030218899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Ferroelectric memory devices having a plate line control circuit and methods for operating the same' [patent_app_type] => new [patent_app_number] => 10/358550 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7009 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20030218899.pdf [firstpage_image] =>[orig_patent_app_number] => 10358550 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7263484 [patent_doc_number] => 20040151034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Method and circuit for operating a memory cell using a single charge pump' [patent_app_type] => new [patent_app_number] => 10/354050 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4251 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20040151034.pdf [firstpage_image] =>[orig_patent_app_number] => 10354050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1122884 [patent_doc_number] => 06798703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Semiconductor memory device having improved replacement efficiency of defective word lines by redundancy word lines' [patent_app_type] => B2 [patent_app_number] => 10/348752 [patent_app_country] => US [patent_app_date] => 2003-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4282 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798703.pdf [firstpage_image] =>[orig_patent_app_number] => 10348752 [rel_patent_id] =>[rel_patent_doc_number] =>)