Search

Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1288423 [patent_doc_number] => 06643218 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Precharge control signal generator, and semiconductor memory device using the same' [patent_app_type] => B1 [patent_app_number] => 10/347276 [patent_app_country] => US [patent_app_date] => 2003-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7032 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643218.pdf [firstpage_image] =>[orig_patent_app_number] => 10347276 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/347276
Precharge control signal generator, and semiconductor memory device using the same Jan 20, 2003 Issued
Array ( [id] => 6696902 [patent_doc_number] => 20030109096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Non volatile memory and data processor' [patent_app_type] => new [patent_app_number] => 10/345945 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10693 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20030109096.pdf [firstpage_image] =>[orig_patent_app_number] => 10345945 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345945
Non volatile memory and data processor Jan 16, 2003 Issued
Array ( [id] => 7331114 [patent_doc_number] => 20040130936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Spin-transfer multilayer stack containing magnetic layers with resettable magnetization' [patent_app_type] => new [patent_app_number] => 10/338148 [patent_app_country] => US [patent_app_date] => 2003-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14335 [patent_no_of_claims] => 80 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20040130936.pdf [firstpage_image] =>[orig_patent_app_number] => 10338148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/338148
Spin-transfer multilayer stack containing magnetic layers with resettable magnetization Jan 6, 2003 Issued
Array ( [id] => 430060 [patent_doc_number] => 07269075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Method and apparatus for simultaneous differential data sensing and capture in a high speed memory' [patent_app_type] => utility [patent_app_number] => 10/337346 [patent_app_country] => US [patent_app_date] => 2003-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2577 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/269/07269075.pdf [firstpage_image] =>[orig_patent_app_number] => 10337346 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/337346
Method and apparatus for simultaneous differential data sensing and capture in a high speed memory Jan 6, 2003 Issued
Array ( [id] => 6850365 [patent_doc_number] => 20030142567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Method and apparatus for accelerating signal equalization between a pair of signal lines' [patent_app_type] => new [patent_app_number] => 10/336851 [patent_app_country] => US [patent_app_date] => 2003-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3221 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20030142567.pdf [firstpage_image] =>[orig_patent_app_number] => 10336851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/336851
Method and apparatus for accelerating signal equalization between a pair of signal lines Jan 5, 2003 Issued
Array ( [id] => 6705232 [patent_doc_number] => 20030151966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'High speed DRAM architecture with uniform access latency' [patent_app_type] => new [patent_app_number] => 10/336850 [patent_app_country] => US [patent_app_date] => 2003-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7727 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20030151966.pdf [firstpage_image] =>[orig_patent_app_number] => 10336850 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/336850
High speed DRAM architecture with uniform access latency Jan 5, 2003 Issued
Array ( [id] => 7360397 [patent_doc_number] => 20040004883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/335948 [patent_app_country] => US [patent_app_date] => 2003-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8956 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004883.pdf [firstpage_image] =>[orig_patent_app_number] => 10335948 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/335948
Semiconductor memory Jan 2, 2003 Issued
Array ( [id] => 6768933 [patent_doc_number] => 20030214873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Decoding apparatus for semiconductor memory device, and enable method therefore' [patent_app_type] => new [patent_app_number] => 10/331746 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3413 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20030214873.pdf [firstpage_image] =>[orig_patent_app_number] => 10331746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/331746
Decoding apparatus for semiconductor memory device, and enable method therefore Dec 29, 2002 Issued
Array ( [id] => 1122840 [patent_doc_number] => 06798685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Multi-output multiplexor' [patent_app_type] => B2 [patent_app_number] => 10/330150 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7986 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798685.pdf [firstpage_image] =>[orig_patent_app_number] => 10330150 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/330150
Multi-output multiplexor Dec 25, 2002 Issued
Array ( [id] => 883978 [patent_doc_number] => RE040172 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2008-03-25 [patent_title] => 'Multi-bank testing apparatus for a synchronous dram' [patent_app_type] => reissue [patent_app_number] => 10/334147 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4198 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/040/RE040172.pdf [firstpage_image] =>[orig_patent_app_number] => 10334147 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/334147
Multi-bank testing apparatus for a synchronous dram Dec 25, 2002 Issued
Array ( [id] => 6682022 [patent_doc_number] => 20030117886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/328149 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6814 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20030117886.pdf [firstpage_image] =>[orig_patent_app_number] => 10328149 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/328149
Non-volatile semiconductor memory device having memory blocks pre-programmed before erased Dec 22, 2002 Issued
Array ( [id] => 1140241 [patent_doc_number] => 06785187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'Semiconductor device having integrated memory and logic' [patent_app_type] => B2 [patent_app_number] => 10/325932 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14667 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785187.pdf [firstpage_image] =>[orig_patent_app_number] => 10325932 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/325932
Semiconductor device having integrated memory and logic Dec 22, 2002 Issued
Array ( [id] => 7624504 [patent_doc_number] => 06724672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Integrated memory having a precharge circuit for precharging a bit line' [patent_app_type] => B2 [patent_app_number] => 10/325349 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 0 [patent_no_of_words] => 2567 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/724/06724672.pdf [firstpage_image] =>[orig_patent_app_number] => 10325349 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/325349
Integrated memory having a precharge circuit for precharging a bit line Dec 17, 2002 Issued
Array ( [id] => 1163771 [patent_doc_number] => 06765830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Memory device with SRAM interface and DRAM cells' [patent_app_type] => B2 [patent_app_number] => 10/318746 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2494 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765830.pdf [firstpage_image] =>[orig_patent_app_number] => 10318746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318746
Memory device with SRAM interface and DRAM cells Dec 12, 2002 Issued
Array ( [id] => 6855116 [patent_doc_number] => 20030128617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Semiconductor memory device and a method for generating a block selection signal of the same' [patent_app_type] => new [patent_app_number] => 10/318446 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128617.pdf [firstpage_image] =>[orig_patent_app_number] => 10318446 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318446
Semiconductor memory device and a method for generating a block selection signal of the same Dec 12, 2002 Issued
Array ( [id] => 944802 [patent_doc_number] => 06967858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-22 [patent_title] => 'Nonvolatile ferroelectric memory device and method for storing multiple bit using the same' [patent_app_type] => utility [patent_app_number] => 10/317150 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 10204 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967858.pdf [firstpage_image] =>[orig_patent_app_number] => 10317150 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317150
Nonvolatile ferroelectric memory device and method for storing multiple bit using the same Dec 11, 2002 Issued
Array ( [id] => 6667682 [patent_doc_number] => 20030112665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Semiconductor memory device, data processor, and method of determining frequency' [patent_app_type] => new [patent_app_number] => 10/317066 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8932 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20030112665.pdf [firstpage_image] =>[orig_patent_app_number] => 10317066 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317066
Semiconductor memory device, data processor, and method of determining frequency Dec 11, 2002 Abandoned
Array ( [id] => 7352395 [patent_doc_number] => 20040013002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'METHOD OF ERASING FLASH MEMORY CELLS' [patent_app_type] => new [patent_app_number] => 10/315246 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2391 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20040013002.pdf [firstpage_image] =>[orig_patent_app_number] => 10315246 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/315246
Method of erasing flash memory cells Dec 9, 2002 Issued
Array ( [id] => 7610480 [patent_doc_number] => 06842378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Flash memory device and method of erasing the same' [patent_app_type] => utility [patent_app_number] => 10/310142 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5209 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842378.pdf [firstpage_image] =>[orig_patent_app_number] => 10310142 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/310142
Flash memory device and method of erasing the same Dec 4, 2002 Issued
Array ( [id] => 1194901 [patent_doc_number] => 06731542 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Circuit for accurate memory read operations' [patent_app_type] => B1 [patent_app_number] => 10/313444 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5040 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731542.pdf [firstpage_image] =>[orig_patent_app_number] => 10313444 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313444
Circuit for accurate memory read operations Dec 4, 2002 Issued
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