
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6667669
[patent_doc_number] => 20030112652
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-19
[patent_title] => 'Semiconductor integrated circuit'
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[patent_app_number] => 10/289254
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Array
(
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[patent_issue_date] => 2003-10-23
[patent_title] => 'Multi-clock domain data input-processing device having clock-reciving locked loop and clock signal input method thereof'
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Array
(
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[patent_issue_date] => 2004-06-29
[patent_title] => 'Synchronous DRAM controller'
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Array
(
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[patent_issue_date] => 2004-06-22
[patent_title] => 'Method of programming memory cells'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/282847 | Method of programming memory cells | Oct 28, 2002 | Issued |
Array
(
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[patent_title] => 'Nonvolatile semiconductor memory unit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/281249 | Nonvolatile semiconductor memory unit | Oct 27, 2002 | Issued |
Array
(
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[patent_title] => 'Ferroelectric semiconductor memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/279853 | Ferroelectric semiconductor memory | Oct 24, 2002 | Issued |
Array
(
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[patent_title] => 'Semiconductor memory'
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[firstpage_image] =>[orig_patent_app_number] => 10277150
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/277150 | Semiconductor integrated circuit having connecting wires for interconnecting bit lines | Oct 21, 2002 | Issued |
Array
(
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[patent_doc_number] => 06735105
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[patent_issue_date] => 2004-05-11
[patent_title] => 'Semiconductor circuit supplied with a varying power supply voltage, and method for operating the same'
[patent_app_type] => B2
[patent_app_number] => 10/277050
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Array
(
[id] => 7162913
[patent_doc_number] => 20040076042
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[patent_title] => 'High performance memory column group repair scheme with small area penalty'
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Array
(
[id] => 6808158
[patent_doc_number] => 20030198097
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[patent_issue_date] => 2003-10-23
[patent_title] => 'Semiconductor memory device having preamplifier with improved data propagation speed'
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Array
(
[id] => 1174127
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[patent_title] => 'Semiconductor memory having dual port cell supporting hidden refresh'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/269599 | Semiconductor memory having dual port cell supporting hidden refresh | Oct 9, 2002 | Issued |
Array
(
[id] => 1234523
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Array
(
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Array
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Array
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Array
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[patent_title] => 'DRAM'
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Array
(
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[patent_title] => 'Bit line control decoder circuit, virtual ground type nonvolatile semiconductor storage device provided with the decoder circuit, and data read method of virtual ground type nonvolatile semiconductor storage device'
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