Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6799466 [patent_doc_number] => 20030094630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Nonvolatile ferroelectric memory device and method for driving the same' [patent_app_type] => new [patent_app_number] => 10/251848 [patent_app_country] => US [patent_app_date] => 2002-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5009 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20030094630.pdf [firstpage_image] =>[orig_patent_app_number] => 10251848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/251848
Nonvolatile ferroelectric memory device and method for driving the same Sep 22, 2002 Issued
Array ( [id] => 1176063 [patent_doc_number] => 06754106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'Reference cell with various load circuits compensating for source side loading effects in a non-volatile memory' [patent_app_type] => B1 [patent_app_number] => 10/245146 [patent_app_country] => US [patent_app_date] => 2002-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5595 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754106.pdf [firstpage_image] =>[orig_patent_app_number] => 10245146 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245146
Reference cell with various load circuits compensating for source side loading effects in a non-volatile memory Sep 15, 2002 Issued
10/243753 SEMICONDUCTOR MEMORY DEVICE HAVING WORD LINES DRIVEN BY ROW SELECTING SIGNAL AND COLUMN SELECTING SIGNAL LINES ARRANGED PARALLEL TO EACH OTHER Sep 15, 2002 Abandoned
Array ( [id] => 1212549 [patent_doc_number] => 06714459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-30 [patent_title] => 'Nonvolatile semiconductor memory device and method of detecting overerased cell' [patent_app_type] => B2 [patent_app_number] => 10/241752 [patent_app_country] => US [patent_app_date] => 2002-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 12735 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/714/06714459.pdf [firstpage_image] =>[orig_patent_app_number] => 10241752 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/241752
Nonvolatile semiconductor memory device and method of detecting overerased cell Sep 11, 2002 Issued
Array ( [id] => 1172748 [patent_doc_number] => 06760254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/235655 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6860 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 421 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/760/06760254.pdf [firstpage_image] =>[orig_patent_app_number] => 10235655 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/235655
Semiconductor memory device Sep 5, 2002 Issued
Array ( [id] => 1223547 [patent_doc_number] => 06704241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Memory architecture with vertical and horizontal row decoding' [patent_app_type] => B1 [patent_app_number] => 10/238048 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3716 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704241.pdf [firstpage_image] =>[orig_patent_app_number] => 10238048 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/238048
Memory architecture with vertical and horizontal row decoding Sep 5, 2002 Issued
Array ( [id] => 7623015 [patent_doc_number] => 06687150 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Reference voltage generation for memory circuits' [patent_app_type] => B1 [patent_app_number] => 10/064955 [patent_app_country] => US [patent_app_date] => 2002-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1760 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687150.pdf [firstpage_image] =>[orig_patent_app_number] => 10064955 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064955
Reference voltage generation for memory circuits Sep 3, 2002 Issued
Array ( [id] => 1212537 [patent_doc_number] => 06714457 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Parallel channel programming scheme for MLC flash memory' [patent_app_type] => B1 [patent_app_number] => 10/233642 [patent_app_country] => US [patent_app_date] => 2002-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 8382 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/714/06714457.pdf [firstpage_image] =>[orig_patent_app_number] => 10233642 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233642
Parallel channel programming scheme for MLC flash memory Sep 2, 2002 Issued
Array ( [id] => 1204608 [patent_doc_number] => 06721210 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Voltage boosting circuit for a low power semiconductor memory' [patent_app_type] => B1 [patent_app_number] => 10/232852 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5367 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 443 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/721/06721210.pdf [firstpage_image] =>[orig_patent_app_number] => 10232852 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232852
Voltage boosting circuit for a low power semiconductor memory Aug 29, 2002 Issued
Array ( [id] => 7611870 [patent_doc_number] => 06903969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'One-device non-volatile random access memory cell' [patent_app_type] => utility [patent_app_number] => 10/232848 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 6938 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903969.pdf [firstpage_image] =>[orig_patent_app_number] => 10232848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232848
One-device non-volatile random access memory cell Aug 29, 2002 Issued
Array ( [id] => 6719661 [patent_doc_number] => 20030053349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Blowable memory device and method of blowing such a memory' [patent_app_type] => new [patent_app_number] => 10/233052 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3427 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20030053349.pdf [firstpage_image] =>[orig_patent_app_number] => 10233052 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233052
Blowable memory device and method of blowing such a memory Aug 29, 2002 Issued
Array ( [id] => 7131770 [patent_doc_number] => 20040042255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Method and apparatus for latency specific duty cycle correction' [patent_app_type] => new [patent_app_number] => 10/230546 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3704 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20040042255.pdf [firstpage_image] =>[orig_patent_app_number] => 10230546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230546
Method and apparatus for latency specific duty cycle correction Aug 28, 2002 Issued
Array ( [id] => 1322665 [patent_doc_number] => 06608772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-19 [patent_title] => 'Low-power semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/230213 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 47 [patent_no_of_words] => 28065 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/608/06608772.pdf [firstpage_image] =>[orig_patent_app_number] => 10230213 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230213
Low-power semiconductor memory device Aug 28, 2002 Issued
Array ( [id] => 7963111 [patent_doc_number] => 06680874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'Delay lock loop circuit useful in a synchronous system and associated methods' [patent_app_type] => B1 [patent_app_number] => 10/230750 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 33 [patent_no_of_words] => 14840 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680874.pdf [firstpage_image] =>[orig_patent_app_number] => 10230750 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230750
Delay lock loop circuit useful in a synchronous system and associated methods Aug 28, 2002 Issued
Array ( [id] => 1204587 [patent_doc_number] => 06721197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Antifuse memory cell and antifuse memory cell array' [patent_app_type] => B1 [patent_app_number] => 10/231655 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3347 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/721/06721197.pdf [firstpage_image] =>[orig_patent_app_number] => 10231655 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/231655
Antifuse memory cell and antifuse memory cell array Aug 27, 2002 Issued
Array ( [id] => 6749131 [patent_doc_number] => 20030043651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Semiconductor storage device and setting method thereof' [patent_app_type] => new [patent_app_number] => 10/229147 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10067 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20030043651.pdf [firstpage_image] =>[orig_patent_app_number] => 10229147 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229147
Semiconductor storage device and setting method thereof Aug 27, 2002 Issued
Array ( [id] => 1376904 [patent_doc_number] => 06570798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Antifuse memory cell and antifuse memory cell array' [patent_app_type] => B1 [patent_app_number] => 10/231708 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3338 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570798.pdf [firstpage_image] =>[orig_patent_app_number] => 10231708 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/231708
Antifuse memory cell and antifuse memory cell array Aug 27, 2002 Issued
Array ( [id] => 1042107 [patent_doc_number] => 06870757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Thin film magnetic memory device applying a magnetic field to write data' [patent_app_type] => utility [patent_app_number] => 10/227452 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 0 [patent_no_of_words] => 11898 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870757.pdf [firstpage_image] =>[orig_patent_app_number] => 10227452 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/227452
Thin film magnetic memory device applying a magnetic field to write data Aug 25, 2002 Issued
Array ( [id] => 994834 [patent_doc_number] => 06917546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Memory device and memory system' [patent_app_type] => utility [patent_app_number] => 10/227647 [patent_app_country] => US [patent_app_date] => 2002-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8136 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/917/06917546.pdf [firstpage_image] =>[orig_patent_app_number] => 10227647 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/227647
Memory device and memory system Aug 22, 2002 Issued
Array ( [id] => 1140238 [patent_doc_number] => 06785186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'Design of an high speed xdecoder driving a large wordline load consuming less switching current for use in high speed syncflash memory' [patent_app_type] => B2 [patent_app_number] => 10/224451 [patent_app_country] => US [patent_app_date] => 2002-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2428 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785186.pdf [firstpage_image] =>[orig_patent_app_number] => 10224451 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/224451
Design of an high speed xdecoder driving a large wordline load consuming less switching current for use in high speed syncflash memory Aug 20, 2002 Issued
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