
Son Luu Mai
Examiner (ID: 18155)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818 |
| Total Applications | 3063 |
| Issued Applications | 2917 |
| Pending Applications | 45 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7963111
[patent_doc_number] => 06680874
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-20
[patent_title] => 'Delay lock loop circuit useful in a synchronous system and associated methods'
[patent_app_type] => B1
[patent_app_number] => 10/230750
[patent_app_country] => US
[patent_app_date] => 2002-08-29
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[pdf_file] => patents/06/680/06680874.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230750 | Delay lock loop circuit useful in a synchronous system and associated methods | Aug 28, 2002 | Issued |
Array
(
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[patent_doc_number] => 20040042255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-04
[patent_title] => 'Method and apparatus for latency specific duty cycle correction'
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[patent_app_number] => 10/230546
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[firstpage_image] =>[orig_patent_app_number] => 10230546
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230546 | Method and apparatus for latency specific duty cycle correction | Aug 28, 2002 | Issued |
Array
(
[id] => 6749131
[patent_doc_number] => 20030043651
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Semiconductor storage device and setting method thereof'
[patent_app_type] => new
[patent_app_number] => 10/229147
[patent_app_country] => US
[patent_app_date] => 2002-08-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/229147 | Semiconductor storage device and setting method thereof | Aug 27, 2002 | Issued |
Array
(
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[patent_doc_number] => 06721197
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-13
[patent_title] => 'Antifuse memory cell and antifuse memory cell array'
[patent_app_type] => B1
[patent_app_number] => 10/231655
[patent_app_country] => US
[patent_app_date] => 2002-08-28
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[pdf_file] => patents/06/721/06721197.pdf
[firstpage_image] =>[orig_patent_app_number] => 10231655
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/231655 | Antifuse memory cell and antifuse memory cell array | Aug 27, 2002 | Issued |
Array
(
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[patent_doc_number] => 06570798
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[patent_issue_date] => 2003-05-27
[patent_title] => 'Antifuse memory cell and antifuse memory cell array'
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[pdf_file] => patents/06/570/06570798.pdf
[firstpage_image] =>[orig_patent_app_number] => 10231708
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/231708 | Antifuse memory cell and antifuse memory cell array | Aug 27, 2002 | Issued |
Array
(
[id] => 1042107
[patent_doc_number] => 06870757
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-22
[patent_title] => 'Thin film magnetic memory device applying a magnetic field to write data'
[patent_app_type] => utility
[patent_app_number] => 10/227452
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/227452 | Thin film magnetic memory device applying a magnetic field to write data | Aug 25, 2002 | Issued |
Array
(
[id] => 994834
[patent_doc_number] => 06917546
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-07-12
[patent_title] => 'Memory device and memory system'
[patent_app_type] => utility
[patent_app_number] => 10/227647
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[patent_app_date] => 2002-08-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/917/06917546.pdf
[firstpage_image] =>[orig_patent_app_number] => 10227647
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/227647 | Memory device and memory system | Aug 22, 2002 | Issued |
Array
(
[id] => 1140238
[patent_doc_number] => 06785186
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-31
[patent_title] => 'Design of an high speed xdecoder driving a large wordline load consuming less switching current for use in high speed syncflash memory'
[patent_app_type] => B2
[patent_app_number] => 10/224451
[patent_app_country] => US
[patent_app_date] => 2002-08-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/785/06785186.pdf
[firstpage_image] =>[orig_patent_app_number] => 10224451
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/224451 | Design of an high speed xdecoder driving a large wordline load consuming less switching current for use in high speed syncflash memory | Aug 20, 2002 | Issued |
Array
(
[id] => 1183142
[patent_doc_number] => 06744654
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-01
[patent_title] => 'High density dynamic ternary-CAM memory architecture'
[patent_app_type] => B2
[patent_app_number] => 10/224452
[patent_app_country] => US
[patent_app_date] => 2002-08-21
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[firstpage_image] =>[orig_patent_app_number] => 10224452
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/224452 | High density dynamic ternary-CAM memory architecture | Aug 20, 2002 | Issued |
Array
(
[id] => 1249647
[patent_doc_number] => 06674671
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-06
[patent_title] => 'Circuit for lines with multiple drivers'
[patent_app_type] => B1
[patent_app_number] => 10/218348
[patent_app_country] => US
[patent_app_date] => 2002-08-14
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[firstpage_image] =>[orig_patent_app_number] => 10218348
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/218348 | Circuit for lines with multiple drivers | Aug 13, 2002 | Issued |
Array
(
[id] => 1319830
[patent_doc_number] => 06611467
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-08-26
[patent_title] => 'Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines'
[patent_app_type] => B2
[patent_app_number] => 10/212903
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[pdf_file] => patents/06/611/06611467.pdf
[firstpage_image] =>[orig_patent_app_number] => 10212903
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/212903 | Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines | Aug 4, 2002 | Issued |
Array
(
[id] => 1227315
[patent_doc_number] => 06700818
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[patent_issue_date] => 2004-03-02
[patent_title] => 'Method for operating a memory device'
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[firstpage_image] =>[orig_patent_app_number] => 10211248
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/211248 | Method for operating a memory device | Aug 4, 2002 | Issued |
Array
(
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[patent_title] => 'Asynchronous queuing circuit for DRAM external RAS accesses'
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Array
(
[id] => 1406573
[patent_doc_number] => 06549442
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[patent_title] => 'Hardware-assisted fast bank-swap in a content-addressable-memory (CAM) processor'
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Array
(
[id] => 1275787
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[patent_title] => 'Nonvolatile semiconductor memory device'
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Array
(
[id] => 7352399
[patent_doc_number] => 20040013004
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[patent_title] => 'Lower power consuming sense amplifier'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/198454 | Lower power consuming sense amplifier | Jul 17, 2002 | Abandoned |
Array
(
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[patent_title] => 'Memory employing multiple enable/disable modes for redundant elements and testing method using same'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/197049 | Erase method of split gate flash memory reference cells | Jul 16, 2002 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/195753 | Memory and method for replacing defective memory cells in the same | Jul 14, 2002 | Abandoned |