Search

Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1174092 [patent_doc_number] => 06757195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Flash memory having enhanced yield and having enhanced reliability in redundant and dummy circuits' [patent_app_type] => B2 [patent_app_number] => 10/193252 [patent_app_country] => US [patent_app_date] => 2002-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 7684 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757195.pdf [firstpage_image] =>[orig_patent_app_number] => 10193252 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/193252
Flash memory having enhanced yield and having enhanced reliability in redundant and dummy circuits Jul 11, 2002 Issued
Array ( [id] => 7360461 [patent_doc_number] => 20040004896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'DYNAMIC INPUT THRESHOLDS FOR SEMICONDUCTOR DEVICES' [patent_app_type] => new [patent_app_number] => 10/190648 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1954 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004896.pdf [firstpage_image] =>[orig_patent_app_number] => 10190648 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190648
Dynamic input thresholds for semiconductor devices Jul 7, 2002 Issued
Array ( [id] => 7360254 [patent_doc_number] => 20040004860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Column decode circuit for high density/high performance memories' [patent_app_type] => new [patent_app_number] => 10/190650 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5478 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004860.pdf [firstpage_image] =>[orig_patent_app_number] => 10190650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190650
Column decode circuit for high density/high performance memories Jul 7, 2002 Issued
Array ( [id] => 6435781 [patent_doc_number] => 20020176303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Device and method for repairing a memory array by storing each bit in multiple memory cells in the array' [patent_app_type] => new [patent_app_number] => 10/189138 [patent_app_country] => US [patent_app_date] => 2002-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8219 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20020176303.pdf [firstpage_image] =>[orig_patent_app_number] => 10189138 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/189138
Device and method for repairing a memory array by storing each bit in multiple memory cells in the array Jul 1, 2002 Issued
Array ( [id] => 6773235 [patent_doc_number] => 20030016573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Non-volatile semiconductor memory device and information apparatus' [patent_app_type] => new [patent_app_number] => 10/187048 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9950 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20030016573.pdf [firstpage_image] =>[orig_patent_app_number] => 10187048 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/187048
Non-volatile semiconductor memory device and information apparatus Jun 27, 2002 Issued
Array ( [id] => 6734430 [patent_doc_number] => 20030012065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-16 [patent_title] => 'Burst mode receiving apparatus having an offset compensating function and a data recovery method thereof' [patent_app_type] => new [patent_app_number] => 10/183046 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6453 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20030012065.pdf [firstpage_image] =>[orig_patent_app_number] => 10183046 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183046
Burst mode receiving apparatus having an offset compensating function and a data recovery method thereof Jun 26, 2002 Issued
Array ( [id] => 6754575 [patent_doc_number] => 20030002351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Integrated memory circuit and method for reading a data item from a memory cell' [patent_app_type] => new [patent_app_number] => 10/178646 [patent_app_country] => US [patent_app_date] => 2002-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4675 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20030002351.pdf [firstpage_image] =>[orig_patent_app_number] => 10178646 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/178646
Integrated memory circuit and method for reading a data item from a memory cell Jun 23, 2002 Abandoned
Array ( [id] => 6714777 [patent_doc_number] => 20030026125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Thin film magnetic memory device including memory cells having a magnetic tunnel junction' [patent_app_type] => new [patent_app_number] => 10/175846 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 23928 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20030026125.pdf [firstpage_image] =>[orig_patent_app_number] => 10175846 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175846
Thin film magnetic memory device including memory cells having a magnetic tunnel junction Jun 20, 2002 Issued
Array ( [id] => 6546984 [patent_doc_number] => 20020163847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-07 [patent_title] => 'Dynamic random access memory with low power consumption' [patent_app_type] => new [patent_app_number] => 10/175859 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3625 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20020163847.pdf [firstpage_image] =>[orig_patent_app_number] => 10175859 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175859
Dynamic random access memory with low power consumption Jun 20, 2002 Issued
Array ( [id] => 1227317 [patent_doc_number] => 06700819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-02 [patent_title] => 'Memory with improved differential reading system' [patent_app_type] => B2 [patent_app_number] => 10/176954 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 6406 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700819.pdf [firstpage_image] =>[orig_patent_app_number] => 10176954 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176954
Memory with improved differential reading system Jun 19, 2002 Issued
Array ( [id] => 6644175 [patent_doc_number] => 20030007404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Sense amplifier circuit' [patent_app_type] => new [patent_app_number] => 10/173155 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2847 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20030007404.pdf [firstpage_image] =>[orig_patent_app_number] => 10173155 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/173155
Sense amplifier circuit Jun 17, 2002 Issued
Array ( [id] => 1140168 [patent_doc_number] => 06785167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'ROM embedded DRAM with programming' [patent_app_type] => B2 [patent_app_number] => 10/174746 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3609 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785167.pdf [firstpage_image] =>[orig_patent_app_number] => 10174746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/174746
ROM embedded DRAM with programming Jun 17, 2002 Issued
Array ( [id] => 1334623 [patent_doc_number] => 06600675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-29 [patent_title] => 'Reference circuit in ferroelectric memory and method for driving the same' [patent_app_type] => B2 [patent_app_number] => 10/170646 [patent_app_country] => US [patent_app_date] => 2002-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5340 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600675.pdf [firstpage_image] =>[orig_patent_app_number] => 10170646 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/170646
Reference circuit in ferroelectric memory and method for driving the same Jun 13, 2002 Issued
Array ( [id] => 1349975 [patent_doc_number] => 06590801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-08 [patent_title] => 'Current leakage reduction for loaded bit-lines in on-chip memory structures' [patent_app_type] => B2 [patent_app_number] => 10/172106 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 1942 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/590/06590801.pdf [firstpage_image] =>[orig_patent_app_number] => 10172106 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/172106
Current leakage reduction for loaded bit-lines in on-chip memory structures Jun 12, 2002 Issued
Array ( [id] => 6754550 [patent_doc_number] => 20030002326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Current leakage reduction for loaded bit-lines in on-chip memory structures' [patent_app_type] => new [patent_app_number] => 10/172234 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1963 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20030002326.pdf [firstpage_image] =>[orig_patent_app_number] => 10172234 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/172234
Current leakage reduction for loaded bit-lines in on-chip memory structures Jun 12, 2002 Abandoned
Array ( [id] => 1427758 [patent_doc_number] => 06519178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-11 [patent_title] => 'Current leakage reduction for loaded bit-lines in on-chip memory structures' [patent_app_type] => B2 [patent_app_number] => 10/172107 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 1936 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519178.pdf [firstpage_image] =>[orig_patent_app_number] => 10172107 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/172107
Current leakage reduction for loaded bit-lines in on-chip memory structures Jun 12, 2002 Issued
Array ( [id] => 1319098 [patent_doc_number] => 06614680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-02 [patent_title] => 'Current leakage reduction for loaded bit-lines in on-chip memory structures' [patent_app_type] => B2 [patent_app_number] => 10/172277 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 1936 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614680.pdf [firstpage_image] =>[orig_patent_app_number] => 10172277 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/172277
Current leakage reduction for loaded bit-lines in on-chip memory structures Jun 12, 2002 Issued
Array ( [id] => 1426110 [patent_doc_number] => 06510077 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Current leakage reduction for loaded bit-lines in on-chip memory structures' [patent_app_type] => B1 [patent_app_number] => 10/172233 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 1935 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510077.pdf [firstpage_image] =>[orig_patent_app_number] => 10172233 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/172233
Current leakage reduction for loaded bit-lines in on-chip memory structures Jun 12, 2002 Issued
Array ( [id] => 1285480 [patent_doc_number] => 06646944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/164651 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 55 [patent_no_of_words] => 32698 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646944.pdf [firstpage_image] =>[orig_patent_app_number] => 10164651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/164651
Semiconductor memory device Jun 9, 2002 Issued
Array ( [id] => 6695722 [patent_doc_number] => 20030107916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'THIN FILM MAGNETIC MEMORY DEVICE CONDUCTING DATA READ OPERATION WITHOUT USING A REFERENCE CELL' [patent_app_type] => new [patent_app_number] => 10/164548 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12526 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107916.pdf [firstpage_image] =>[orig_patent_app_number] => 10164548 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/164548
Thin film magnetic memory device conducting data read operation without using a reference cell Jun 9, 2002 Issued
Menu