Search

Son T. Dinh

Examiner (ID: 18265, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824, 2511, 2502, 2818
Total Applications
3097
Issued Applications
2936
Pending Applications
84
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7185576 [patent_doc_number] => 20050191822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Shallow Trench Isolation Method for a Semiconductor Wafer' [patent_app_type] => utility [patent_app_number] => 10/908438 [patent_app_country] => US [patent_app_date] => 2005-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 2279 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20050191822.pdf [firstpage_image] =>[orig_patent_app_number] => 10908438 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/908438
Shallow Trench Isolation Method for a Semiconductor Wafer May 11, 2005 Abandoned
Array ( [id] => 6939269 [patent_doc_number] => 20050112832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/982903 [patent_app_country] => US [patent_app_date] => 2004-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5908 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20050112832.pdf [firstpage_image] =>[orig_patent_app_number] => 10982903 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/982903
Method of manufacturing semiconductor device Nov 7, 2004 Abandoned
Array ( [id] => 7010903 [patent_doc_number] => 20050064619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Process for a monolithically-integrated micromachined sensor and circuit' [patent_app_type] => utility [patent_app_number] => 10/955128 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4304 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20050064619.pdf [firstpage_image] =>[orig_patent_app_number] => 10955128 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/955128
Process for a monolithically-integrated micromachined sensor and circuit Sep 29, 2004 Abandoned
Array ( [id] => 757762 [patent_doc_number] => 07015131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Semiconductor device using bumps, method for fabricating same, and method for forming bumps' [patent_app_type] => utility [patent_app_number] => 10/949502 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7458 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015131.pdf [firstpage_image] =>[orig_patent_app_number] => 10949502 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/949502
Semiconductor device using bumps, method for fabricating same, and method for forming bumps Sep 23, 2004 Issued
Array ( [id] => 770291 [patent_doc_number] => 07005743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Semiconductor device using bumps, method for fabricating same, and method for forming bumps' [patent_app_type] => utility [patent_app_number] => 10/949640 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7457 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005743.pdf [firstpage_image] =>[orig_patent_app_number] => 10949640 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/949640
Semiconductor device using bumps, method for fabricating same, and method for forming bumps Sep 23, 2004 Issued
Array ( [id] => 767158 [patent_doc_number] => 07009245 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'High-K tunneling dielectric for read only memory device and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 10/711004 [patent_app_country] => US [patent_app_date] => 2004-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3024 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009245.pdf [firstpage_image] =>[orig_patent_app_number] => 10711004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/711004
High-K tunneling dielectric for read only memory device and fabrication method thereof Aug 16, 2004 Issued
Array ( [id] => 7264146 [patent_doc_number] => 20040241986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Processing methods of forming an electrically conductive plug to a node location' [patent_app_type] => new [patent_app_number] => 10/884584 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2590 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20040241986.pdf [firstpage_image] =>[orig_patent_app_number] => 10884584 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/884584
Processing methods of forming an electrically conductive plug to a node location Jun 30, 2004 Issued
Array ( [id] => 7275237 [patent_doc_number] => 20040234688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Use of cyclic siloxanes for hardness improvement' [patent_app_type] => new [patent_app_number] => 10/875668 [patent_app_country] => US [patent_app_date] => 2004-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20040234688.pdf [firstpage_image] =>[orig_patent_app_number] => 10875668 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/875668
Use of cyclic siloxanes for hardness improvement Jun 22, 2004 Abandoned
Array ( [id] => 7428793 [patent_doc_number] => 20040209384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Low temperature chemical vapor deposition process for forming bismuth-containing ceramic thin films useful in ferroelectric memory devices' [patent_app_type] => new [patent_app_number] => 10/836550 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9077 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20040209384.pdf [firstpage_image] =>[orig_patent_app_number] => 10836550 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/836550
Low temperature chemical vapor deposition process for forming bismuth-containing ceramic thin films useful in ferroelectric memory devices Apr 29, 2004 Issued
Array ( [id] => 728248 [patent_doc_number] => 07041523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Method of fabricating nitride semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/815847 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 12785 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/041/07041523.pdf [firstpage_image] =>[orig_patent_app_number] => 10815847 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/815847
Method of fabricating nitride semiconductor device Apr 1, 2004 Issued
Array ( [id] => 7022931 [patent_doc_number] => 20050017325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Method for fabricating an NPN transistor in a BICMOS technology' [patent_app_type] => utility [patent_app_number] => 10/781329 [patent_app_country] => US [patent_app_date] => 2004-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3099 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017325.pdf [firstpage_image] =>[orig_patent_app_number] => 10781329 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781329
Method for fabricating an NPN transistor in a BICMOS technology Feb 17, 2004 Abandoned
90/006934 METHOD OF DIVIDING A WAFER AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Feb 12, 2004 Issued
Array ( [id] => 757584 [patent_doc_number] => 07015075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Die encapsulation using a porous carrier' [patent_app_type] => utility [patent_app_number] => 10/774977 [patent_app_country] => US [patent_app_date] => 2004-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 9 [patent_no_of_words] => 2773 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015075.pdf [firstpage_image] =>[orig_patent_app_number] => 10774977 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/774977
Die encapsulation using a porous carrier Feb 8, 2004 Issued
Array ( [id] => 7677485 [patent_doc_number] => 20040152341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'HDP-CVD deposition process for filling high aspect ratio gaps' [patent_app_type] => new [patent_app_number] => 10/763018 [patent_app_country] => US [patent_app_date] => 2004-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10050 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20040152341.pdf [firstpage_image] =>[orig_patent_app_number] => 10763018 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/763018
HDP-CVD deposition process for filling high aspect ratio gaps Jan 20, 2004 Issued
Array ( [id] => 7429253 [patent_doc_number] => 20040209442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Device manufacturing method and device, electro-optic device, and electronic equipment' [patent_app_type] => new [patent_app_number] => 10/754538 [patent_app_country] => US [patent_app_date] => 2004-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13886 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20040209442.pdf [firstpage_image] =>[orig_patent_app_number] => 10754538 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/754538
Device manufacturing method and device, electro-optic device, and electronic equipment Jan 11, 2004 Abandoned
Array ( [id] => 7304505 [patent_doc_number] => 20040140206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Method for fabricating silicon targets' [patent_app_type] => new [patent_app_number] => 10/749060 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4179 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20040140206.pdf [firstpage_image] =>[orig_patent_app_number] => 10749060 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/749060
Method for fabricating silicon targets Dec 29, 2003 Issued
Array ( [id] => 756222 [patent_doc_number] => 07019346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Capacitor having an anodic metal oxide substrate' [patent_app_type] => utility [patent_app_number] => 10/746767 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4682 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/019/07019346.pdf [firstpage_image] =>[orig_patent_app_number] => 10746767 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/746767
Capacitor having an anodic metal oxide substrate Dec 22, 2003 Issued
Array ( [id] => 7607620 [patent_doc_number] => 07098094 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'NiSi metal gate stacks using a boron-trap' [patent_app_type] => utility [patent_app_number] => 10/734768 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 1908 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/098/07098094.pdf [firstpage_image] =>[orig_patent_app_number] => 10734768 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/734768
NiSi metal gate stacks using a boron-trap Dec 11, 2003 Issued
Array ( [id] => 7466763 [patent_doc_number] => 20040102003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => '6F2 DRAM array, a DRAM array formed on a semiconductive substrate, a method of forming memory cells in a 6F2 DRAM array and a method of isolating a single row of memory cells in a 6F2 DRAM array' [patent_app_type] => new [patent_app_number] => 10/713647 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5320 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20040102003.pdf [firstpage_image] =>[orig_patent_app_number] => 10713647 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/713647
Method of forming memory cells and a method of isolating a single row of memory cells Nov 12, 2003 Issued
Array ( [id] => 7362675 [patent_doc_number] => 20040091640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Liquid crystal display device and fabricating method thereof, and reworking method of alignment film using the same' [patent_app_type] => new [patent_app_number] => 10/698466 [patent_app_country] => US [patent_app_date] => 2003-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3202 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20040091640.pdf [firstpage_image] =>[orig_patent_app_number] => 10698466 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/698466
Liquid crystal display device and fabricating method thereof, and reworking method of alignment film using the same Nov 2, 2003 Issued
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