Search

Son T. Dinh

Examiner (ID: 14834, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2511, 2818, 2824, 2502
Total Applications
3091
Issued Applications
2938
Pending Applications
75
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18639286 [patent_doc_number] => 11763902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Memory device and multi-pass program operation thereof [patent_app_type] => utility [patent_app_number] => 17/483265 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 14527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483265 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483265
Memory device and multi-pass program operation thereof Sep 22, 2021 Issued
Array ( [id] => 17915537 [patent_doc_number] => 20220317933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/483119 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483119 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483119
Storage device and operating method thereof Sep 22, 2021 Issued
Array ( [id] => 17345463 [patent_doc_number] => 20220011794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => DRIVE-SENSE CIRCUIT TO DETERMINE EFFECTS OF DIFFERENT ELECTRICAL CHARACTERISTICS ON LOAD [patent_app_type] => utility [patent_app_number] => 17/448647 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17448647 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/448647
Drive-sense circuit to determine effects of different electrical characteristics on load Sep 22, 2021 Issued
Array ( [id] => 18270072 [patent_doc_number] => 20230091314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => NON-VOLATILE MEMORY WITH REVERSE STATE PROGRAM [patent_app_type] => utility [patent_app_number] => 17/481575 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481575
Non-volatile memory with reverse state program Sep 21, 2021 Issued
Array ( [id] => 18950763 [patent_doc_number] => 11894066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Semiconductor memory device and method of operating the semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/481927 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 32 [patent_no_of_words] => 16911 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481927 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481927
Semiconductor memory device and method of operating the semiconductor memory device Sep 21, 2021 Issued
Array ( [id] => 17764551 [patent_doc_number] => 20220238164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/473293 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21911 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473293
Semiconductor memory device Sep 12, 2021 Issued
Array ( [id] => 17886159 [patent_doc_number] => 20220301636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/447464 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 565 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447464 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447464
Semiconductor memory device Sep 12, 2021 Issued
Array ( [id] => 17757980 [patent_doc_number] => 11398278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Nor flash memory circuit and data writing method [patent_app_type] => utility [patent_app_number] => 17/472613 [patent_app_country] => US [patent_app_date] => 2021-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4201 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472613 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472613
Nor flash memory circuit and data writing method Sep 10, 2021 Issued
Array ( [id] => 18920385 [patent_doc_number] => 11882695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Vertical field effect transistor including integrated antifuse [patent_app_type] => utility [patent_app_number] => 17/470620 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 4882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470620 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470620
Vertical field effect transistor including integrated antifuse Sep 8, 2021 Issued
Array ( [id] => 19523814 [patent_doc_number] => 12125552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Determination circuit and correction method [patent_app_type] => utility [patent_app_number] => 17/469172 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 7640 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469172 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469172
Determination circuit and correction method Sep 7, 2021 Issued
Array ( [id] => 17676402 [patent_doc_number] => 20220189569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/469812 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469812 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469812
Semiconductor memory device Sep 7, 2021 Issued
Array ( [id] => 17915536 [patent_doc_number] => 20220317932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/464791 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464791 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464791
Semiconductor memory device Sep 1, 2021 Issued
Array ( [id] => 17637916 [patent_doc_number] => 11348645 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-31 [patent_title] => Method for programming B4 flash memory [patent_app_type] => utility [patent_app_number] => 17/465272 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3739 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465272
Method for programming B4 flash memory Sep 1, 2021 Issued
Array ( [id] => 18145491 [patent_doc_number] => 20230019347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => METHOD FOR FINDING OPTIMUM READ VOLTAGE AND FLASH MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/464736 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6490 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464736 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464736
Method for finding optimum read voltage and flash memory system Sep 1, 2021 Issued
Array ( [id] => 18228961 [patent_doc_number] => 20230067955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => CURRENT BUDGET ADAPTION [patent_app_type] => utility [patent_app_number] => 17/461558 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461558 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461558
Current budget adaption Aug 29, 2021 Issued
Array ( [id] => 18751303 [patent_doc_number] => 11810621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Memory sub-system sanitization [patent_app_type] => utility [patent_app_number] => 17/458795 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7155 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17458795 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/458795
Memory sub-system sanitization Aug 26, 2021 Issued
Array ( [id] => 17870450 [patent_doc_number] => 20220293187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => OPEN BLOCK-BASED READ OFFSET COMPENSATION IN READ OPERATION OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/459430 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459430 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459430
Open block-based read offset compensation in read operation of memory device Aug 26, 2021 Issued
Array ( [id] => 17277684 [patent_doc_number] => 20210383882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => METHOD OF PROGRAMMING MULTI-PLANE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/412255 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/412255
Method of programming multi-plane memory device Aug 25, 2021 Issued
Array ( [id] => 18228645 [patent_doc_number] => 20230067639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => ELIMINATING WRITE DISTURB FOR SYSTEM METADATA IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/411278 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411278
Eliminating write disturb for system metadata in a memory sub-system Aug 24, 2021 Issued
Array ( [id] => 19733583 [patent_doc_number] => 12211583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Data-buffer controller/control-signal redriver [patent_app_type] => utility [patent_app_number] => 18/021442 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 6506 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18021442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/021442
Data-buffer controller/control-signal redriver Aug 23, 2021 Issued
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