Search

Son T. Dinh

Examiner (ID: 17141, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2824, 2511, 2502
Total Applications
3088
Issued Applications
2939
Pending Applications
71
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18623577 [patent_doc_number] => 11756630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Obtaining threshold voltage measurements for memory cells based on a user read mode [patent_app_type] => utility [patent_app_number] => 17/400609 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 51 [patent_no_of_words] => 20050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400609 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400609
Obtaining threshold voltage measurements for memory cells based on a user read mode Aug 11, 2021 Issued
Array ( [id] => 18520630 [patent_doc_number] => 11710524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Apparatuses and methods for organizing data in a memory device [patent_app_type] => utility [patent_app_number] => 17/398914 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8526 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17398914 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/398914
Apparatuses and methods for organizing data in a memory device Aug 9, 2021 Issued
Array ( [id] => 17886158 [patent_doc_number] => 20220301635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUITS, MULTI-CHIP PACKAGE, AND OPERATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/394577 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394577 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394577
Semiconductor integrated circuits, multi-chip package, and operation method of semiconductor integrated circuits Aug 4, 2021 Issued
Array ( [id] => 17810607 [patent_doc_number] => 20220262442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/395166 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395166
Semiconductor memory device, controller, and operating method thereof Aug 4, 2021 Issued
Array ( [id] => 18528518 [patent_doc_number] => 11715516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Nonvolatile memory device including a fast read page and a storage device including the same [patent_app_type] => utility [patent_app_number] => 17/391209 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391209 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391209
Nonvolatile memory device including a fast read page and a storage device including the same Aug 1, 2021 Issued
Array ( [id] => 17417701 [patent_doc_number] => 20220052605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => Charge Pump Circuit Capable of Generating Voltages in Erasing Operation, Program Operation and Read Operation [patent_app_type] => utility [patent_app_number] => 17/391041 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391041 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391041
Charge pump circuit capable of generating voltages in erasing operation, program operation and read operation Aug 1, 2021 Issued
Array ( [id] => 17231987 [patent_doc_number] => 20210358544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => MEMORY DEVICES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/387964 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387964
Memory devices and methods of forming the same Jul 27, 2021 Issued
Array ( [id] => 18160599 [patent_doc_number] => 20230027191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SYSTEMS AND METHODS FOR NON-PARAMETRIC PV-LEVEL MODELING AND READ THRESHOLD VOLTAGE ESTIMATION [patent_app_type] => utility [patent_app_number] => 17/374750 [patent_app_country] => US [patent_app_date] => 2021-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17374750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/374750
Systems and methods for non-parametric PV-level modeling and read threshold voltage estimation Jul 12, 2021 Issued
Array ( [id] => 17203253 [patent_doc_number] => 20210343348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/373012 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17373012 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/373012
Non-volatile semiconductor storage device Jul 11, 2021 Issued
Array ( [id] => 17188538 [patent_doc_number] => 20210335423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY INCLUDING A READ OPERATION [patent_app_type] => utility [patent_app_number] => 17/371568 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371568
Nonvolatile semiconductor memory including a read operation Jul 8, 2021 Issued
Array ( [id] => 18480993 [patent_doc_number] => 11694744 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Mixed digital-analog memory devices and circuits for secure storage and computing [patent_app_type] => utility [patent_app_number] => 17/368182 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 9644 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368182
Mixed digital-analog memory devices and circuits for secure storage and computing Jul 5, 2021 Issued
Array ( [id] => 18357682 [patent_doc_number] => 11646088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Flash memory programming check circuit [patent_app_type] => utility [patent_app_number] => 17/361645 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3856 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361645 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361645
Flash memory programming check circuit Jun 28, 2021 Issued
Array ( [id] => 18578737 [patent_doc_number] => 11735276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Programming techniques for polarity-based memory cells [patent_app_type] => utility [patent_app_number] => 17/361194 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 17877 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361194
Programming techniques for polarity-based memory cells Jun 27, 2021 Issued
Array ( [id] => 18097061 [patent_doc_number] => 20220415402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => Bias for Data Retention in Fuse ROM and Flash Memory [patent_app_type] => utility [patent_app_number] => 17/358749 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17358749 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/358749
Bias for data retention in fuse ROM and flash memory Jun 24, 2021 Issued
Array ( [id] => 18669724 [patent_doc_number] => 11776634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Pulsed bias for power-up or read recovery [patent_app_type] => utility [patent_app_number] => 17/358927 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 10449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17358927 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/358927
Pulsed bias for power-up or read recovery Jun 24, 2021 Issued
Array ( [id] => 18593128 [patent_doc_number] => 11742037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Memory device and multi-pass program operation thereof [patent_app_type] => utility [patent_app_number] => 17/352247 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 11192 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352247 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352247
Memory device and multi-pass program operation thereof Jun 17, 2021 Issued
Array ( [id] => 18357679 [patent_doc_number] => 11646085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Toggle mode frequency optimization by dynamic ODT matching for non-volatile memory [patent_app_type] => utility [patent_app_number] => 17/349965 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 11121 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349965 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349965
Toggle mode frequency optimization by dynamic ODT matching for non-volatile memory Jun 16, 2021 Issued
Array ( [id] => 17144983 [patent_doc_number] => 20210312996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => SEMICONDUCTOR MEMORY DEVICE CAPABLE OF SHORTENING ERASE TIME [patent_app_type] => utility [patent_app_number] => 17/348886 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348886 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348886
Semiconductor memory device capable of shortening erase time Jun 15, 2021 Issued
Array ( [id] => 18317353 [patent_doc_number] => 11631437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Memory modules including a mirroring circuit and methods of operating the same [patent_app_type] => utility [patent_app_number] => 17/344235 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 12473 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344235 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344235
Memory modules including a mirroring circuit and methods of operating the same Jun 9, 2021 Issued
Array ( [id] => 17115703 [patent_doc_number] => 20210296300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/342748 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342748 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/342748
Semiconductor memory system Jun 8, 2021 Issued
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