Search

Son T. Dinh

Examiner (ID: 17141, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2824, 2511, 2502
Total Applications
3088
Issued Applications
2939
Pending Applications
71
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17999599 [patent_doc_number] => 11500706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Operating method of a nonvolatile memory device for programming multi-page data [patent_app_type] => utility [patent_app_number] => 17/233816 [patent_app_country] => US [patent_app_date] => 2021-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 20087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17233816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/233816
Operating method of a nonvolatile memory device for programming multi-page data Apr 18, 2021 Issued
Array ( [id] => 17900519 [patent_doc_number] => 20220310181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => NEGATIVE GATE STRESS OPERATION IN MULTI-PASS PROGRAMMING AND MEMORY DEVICE THEREOF [patent_app_type] => utility [patent_app_number] => 17/232052 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17232052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/232052
Negative gate stress operation in multi-pass programming and memory device thereof Apr 14, 2021 Issued
Array ( [id] => 16995170 [patent_doc_number] => 20210233590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/230032 [patent_app_country] => US [patent_app_date] => 2021-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230032 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/230032
Non-volatile semiconductor memory device and memory system Apr 13, 2021 Issued
Array ( [id] => 16995176 [patent_doc_number] => 20210233596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/230411 [patent_app_country] => US [patent_app_date] => 2021-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230411 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/230411
Semiconductor memory device Apr 13, 2021 Issued
Array ( [id] => 17893063 [patent_doc_number] => 11456042 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-27 [patent_title] => Multi-level program pulse for programming single level memory cells to reduce damage [patent_app_type] => utility [patent_app_number] => 17/229705 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 48 [patent_no_of_words] => 20556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/229705
Multi-level program pulse for programming single level memory cells to reduce damage Apr 12, 2021 Issued
Array ( [id] => 18016116 [patent_doc_number] => 11508419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Page buffer and memory device including the same [patent_app_type] => utility [patent_app_number] => 17/227412 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 11635 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227412 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227412
Page buffer and memory device including the same Apr 11, 2021 Issued
Array ( [id] => 17978430 [patent_doc_number] => 11495302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Memory device and method of operating the memory device [patent_app_type] => utility [patent_app_number] => 17/228069 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 14660 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228069
Memory device and method of operating the memory device Apr 11, 2021 Issued
Array ( [id] => 17917219 [patent_doc_number] => 20220319615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => Identify the Programming Mode of Memory Cells during Reading of the Memory Cells [patent_app_type] => utility [patent_app_number] => 17/221420 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221420
Identify the programming mode of memory cells during reading of the memory cells Apr 1, 2021 Issued
Array ( [id] => 17893057 [patent_doc_number] => 11456036 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-27 [patent_title] => Predicting and compensating for degradation of memory cells [patent_app_type] => utility [patent_app_number] => 17/221456 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7636 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221456 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221456
Predicting and compensating for degradation of memory cells Apr 1, 2021 Issued
Array ( [id] => 17130055 [patent_doc_number] => 20210304824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => SENSE AMPLIFIER LOOK-THROUGH LATCH FOR FAMOS-BASED EPROM [patent_app_type] => utility [patent_app_number] => 17/219092 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219092
Sense amplifier look-through latch for FAMOS-based EPROM Mar 30, 2021 Issued
Array ( [id] => 17971101 [patent_doc_number] => 11488648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Data storage device and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/217176 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 10512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17217176 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/217176
Data storage device and operating method thereof Mar 29, 2021 Issued
Array ( [id] => 17683230 [patent_doc_number] => 11367491 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-21 [patent_title] => Technique for adjusting read timing parameters for read error handling [patent_app_type] => utility [patent_app_number] => 17/213997 [patent_app_country] => US [patent_app_date] => 2021-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 30 [patent_no_of_words] => 19049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213997 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/213997
Technique for adjusting read timing parameters for read error handling Mar 25, 2021 Issued
Array ( [id] => 17508825 [patent_doc_number] => 20220101928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/212759 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212759 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212759
Semiconductor memory device and method of operating the same Mar 24, 2021 Issued
Array ( [id] => 18838961 [patent_doc_number] => 11847032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Solid state drive, electronic device including solid state drive, and method of managing solid state drive [patent_app_type] => utility [patent_app_number] => 17/208312 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10506 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17208312 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/208312
Solid state drive, electronic device including solid state drive, and method of managing solid state drive Mar 21, 2021 Issued
Array ( [id] => 19100783 [patent_doc_number] => 20240120011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => DETERMINING OFFSETS FOR MEMORY READ OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/637766 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17637766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/637766
Determining offsets for memory read operations Mar 18, 2021 Issued
Array ( [id] => 18235773 [patent_doc_number] => 11600337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Memory device read operations [patent_app_type] => utility [patent_app_number] => 17/203830 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10640 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203830
Memory device read operations Mar 16, 2021 Issued
Array ( [id] => 17818376 [patent_doc_number] => 11423997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/201332 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 17377 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/201332
Semiconductor memory device Mar 14, 2021 Issued
Array ( [id] => 18174965 [patent_doc_number] => 11574682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/200701 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 14700 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200701 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200701
Semiconductor memory device Mar 11, 2021 Issued
Array ( [id] => 17908416 [patent_doc_number] => 11462276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Semiconductor memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/197681 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 13347 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197681
Semiconductor memory device and operating method thereof Mar 9, 2021 Issued
Array ( [id] => 17485677 [patent_doc_number] => 20220093181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MEMORY SYSTEM AND METHOD OF CONTROLLING MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/191331 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191331 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/191331
Memory system and method of controlling memory system Mar 2, 2021 Issued
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