Search

Son T. Dinh

Examiner (ID: 17141, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2824, 2511, 2502
Total Applications
3088
Issued Applications
2939
Pending Applications
71
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17645043 [patent_doc_number] => 20220172782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => MEMORY CELLS FOR STORING OPERATIONAL DATA [patent_app_type] => utility [patent_app_number] => 17/108783 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108783 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108783
Memory cells for storing operational data Nov 30, 2020 Issued
Array ( [id] => 17346849 [patent_doc_number] => 20220013180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => OPERATION METHOD FOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/105669 [patent_app_country] => US [patent_app_date] => 2020-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105669 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/105669
Operation method for memory device Nov 26, 2020 Issued
Array ( [id] => 17622968 [patent_doc_number] => 11342027 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-24 [patent_title] => Systems for adaptively determining read threshold voltage using meta information [patent_app_type] => utility [patent_app_number] => 17/103513 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 10615 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103513 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103513
Systems for adaptively determining read threshold voltage using meta information Nov 23, 2020 Issued
Array ( [id] => 17270401 [patent_doc_number] => 11195830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Memory devices [patent_app_type] => utility [patent_app_number] => 17/100556 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12484 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/100556
Memory devices Nov 19, 2020 Issued
Array ( [id] => 17288934 [patent_doc_number] => 11205491 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-21 [patent_title] => Reading reference current automatic regulation circuit of non-volatile memory [patent_app_type] => utility [patent_app_number] => 16/951018 [patent_app_country] => US [patent_app_date] => 2020-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4909 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 554 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16951018 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/951018
Reading reference current automatic regulation circuit of non-volatile memory Nov 17, 2020 Issued
Array ( [id] => 17402654 [patent_doc_number] => 20220044745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/951160 [patent_app_country] => US [patent_app_date] => 2020-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7448 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16951160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/951160
Memory device Nov 17, 2020 Issued
Array ( [id] => 17318547 [patent_doc_number] => 20210407597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => PAGE BUFFER AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/950385 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950385
Page buffer and semiconductor memory device having the same Nov 16, 2020 Issued
Array ( [id] => 17302756 [patent_doc_number] => 20210398595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => PAGE BUFFER AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 17/097720 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097720
PAGE BUFFER AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME Nov 12, 2020 Abandoned
Array ( [id] => 17787602 [patent_doc_number] => 11410736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/097893 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 10646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097893 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097893
Semiconductor memory device Nov 12, 2020 Issued
Array ( [id] => 16715379 [patent_doc_number] => 20210082526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/096127 [patent_app_country] => US [patent_app_date] => 2020-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 473 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17096127 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/096127
Semiconductor memory device Nov 11, 2020 Issued
Array ( [id] => 16660848 [patent_doc_number] => 20210057485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => METHOD AND RELATED APPARATUS FOR IMPROVING MEMORY CELL PERFORMANCE IN SEMICONDUCTOR-ON-INSULATOR TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 17/093980 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17093980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/093980
Method and related apparatus for improving memory cell performance in semiconductor-on-insulator technology Nov 9, 2020 Issued
Array ( [id] => 16660849 [patent_doc_number] => 20210057486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => METHOD AND RELATED APPARATUS FOR IMPROVING MEMORY CELL PERFORMANCE IN SEMICONDUCTOR-ON-INSULATOR TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 17/094008 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17094008 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/094008
Method and related apparatus for improving memory cell performance in semiconductor-on-insulator technology Nov 9, 2020 Issued
Array ( [id] => 17566323 [patent_doc_number] => 20220130472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => READ THRESHOLD OPTIMIZATION SYSTEMS AND METHODS USING MODEL-LESS REGRESSION [patent_app_type] => utility [patent_app_number] => 17/082838 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082838
Read threshold optimization systems and methods using model-less regression Oct 27, 2020 Issued
Array ( [id] => 16624582 [patent_doc_number] => 20210043235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/077560 [patent_app_country] => US [patent_app_date] => 2020-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17077560 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/077560
Semiconductor device Oct 21, 2020 Issued
Array ( [id] => 18351527 [patent_doc_number] => 20230139638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => IMPROVED POWER SUPPLY FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/287444 [patent_app_country] => US [patent_app_date] => 2020-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17287444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/287444
Power supply for a memory device Oct 8, 2020 Issued
Array ( [id] => 17522906 [patent_doc_number] => 20220108755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => REDUCED-VOLTAGE OPERATION OF A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/065359 [patent_app_country] => US [patent_app_date] => 2020-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17065359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/065359
Reduced-voltage operation of a memory device Oct 6, 2020 Issued
Array ( [id] => 16585805 [patent_doc_number] => 20210020207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => BANK TO BANK DATA TRANSFER [patent_app_type] => utility [patent_app_number] => 17/063495 [patent_app_country] => US [patent_app_date] => 2020-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17063495 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/063495
Bank to bank data transfer Oct 4, 2020 Issued
Array ( [id] => 16585804 [patent_doc_number] => 20210020206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => MEMORY WITH HIGH-SPEED AND AREA-EFFICIENT READ PATH [patent_app_type] => utility [patent_app_number] => 17/039742 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17039742 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/039742
Memory with high-speed and area-efficient read path Sep 29, 2020 Issued
Array ( [id] => 17062934 [patent_doc_number] => 11107543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Adjustment of read and write voltages using a space between threshold voltage distributions [patent_app_type] => utility [patent_app_number] => 17/035501 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 10767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035501 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/035501
Adjustment of read and write voltages using a space between threshold voltage distributions Sep 27, 2020 Issued
Array ( [id] => 17508829 [patent_doc_number] => 20220101932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => STRING CURRENT REDUCTION DURING MULTISTROBE SENSING TO REDUCE READ DISTURB [patent_app_type] => utility [patent_app_number] => 17/032791 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17032791 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/032791
String current reduction during multistrobe sensing to reduce read disturb Sep 24, 2020 Issued
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