Search

Son T. Dinh

Examiner (ID: 17141, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2824, 2511, 2502
Total Applications
3088
Issued Applications
2939
Pending Applications
71
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16911229 [patent_doc_number] => 11043277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-22 [patent_title] => Two multi-level memory cells sensed to determine multiple data values [patent_app_type] => utility [patent_app_number] => 16/869109 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 10973 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869109
Two multi-level memory cells sensed to determine multiple data values May 6, 2020 Issued
Array ( [id] => 16803090 [patent_doc_number] => 10998041 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Calibrating non-volatile memory read thresholds [patent_app_type] => utility [patent_app_number] => 16/869424 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 26055 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869424 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869424
Calibrating non-volatile memory read thresholds May 6, 2020 Issued
Array ( [id] => 17151393 [patent_doc_number] => 11144471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-12 [patent_title] => Dual address encoding for logical-to-physical mapping [patent_app_type] => utility [patent_app_number] => 16/869397 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11885 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869397
Dual address encoding for logical-to-physical mapping May 6, 2020 Issued
Array ( [id] => 17529698 [patent_doc_number] => 11302396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/862167 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9660 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862167 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862167
Memory device Apr 28, 2020 Issued
Array ( [id] => 17002651 [patent_doc_number] => 11081474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-03 [patent_title] => Dynamic resource management in circuit bound array architecture [patent_app_type] => utility [patent_app_number] => 16/862472 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 13351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862472 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862472
Dynamic resource management in circuit bound array architecture Apr 28, 2020 Issued
Array ( [id] => 17757269 [patent_doc_number] => 11397561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Nonvolatile memory device performing a multiplicaiton and accumulation operation [patent_app_type] => utility [patent_app_number] => 16/854759 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5689 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854759 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854759
Nonvolatile memory device performing a multiplicaiton and accumulation operation Apr 20, 2020 Issued
Array ( [id] => 18781968 [patent_doc_number] => 11823733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Memory device, semiconductor device, and electronic device each including redundant memory cell [patent_app_type] => utility [patent_app_number] => 17/600379 [patent_app_country] => US [patent_app_date] => 2020-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 47 [patent_no_of_words] => 39021 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17600379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/600379
Memory device, semiconductor device, and electronic device each including redundant memory cell Apr 16, 2020 Issued
Array ( [id] => 18053354 [patent_doc_number] => 11526739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Nonvolatile memory device performing a multiplication and accumulation operation [patent_app_type] => utility [patent_app_number] => 16/838916 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4423 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838916 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838916
Nonvolatile memory device performing a multiplication and accumulation operation Apr 1, 2020 Issued
Array ( [id] => 18105325 [patent_doc_number] => 11545219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Memory device with single transistor drivers and methods to operate the memory device [patent_app_type] => utility [patent_app_number] => 16/975619 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16529 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16975619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/975619
Memory device with single transistor drivers and methods to operate the memory device Mar 23, 2020 Issued
Array ( [id] => 16330635 [patent_doc_number] => 20200301601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => NAND FLASH THERMAL ALERTING [patent_app_type] => utility [patent_app_number] => 16/826865 [patent_app_country] => US [patent_app_date] => 2020-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16826865 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/826865
NAND flash thermal alerting Mar 22, 2020 Issued
Array ( [id] => 17907769 [patent_doc_number] => 11461624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Neural network with synapse string array [patent_app_type] => utility [patent_app_number] => 16/819798 [patent_app_country] => US [patent_app_date] => 2020-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16819798 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/819798
Neural network with synapse string array Mar 15, 2020 Issued
Array ( [id] => 16560094 [patent_doc_number] => 20210005243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/811331 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811331 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/811331
Semiconductor memory device and operating method thereof Mar 5, 2020 Issued
Array ( [id] => 16080855 [patent_doc_number] => 20200194414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => SEMICONDUCTOR MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/800398 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800398 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/800398
Semiconductor memory system Feb 24, 2020 Issued
Array ( [id] => 16394229 [patent_doc_number] => 20200335170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => MEMORY READ APPARATUS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/800530 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800530 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/800530
Memory read apparatus and methods Feb 24, 2020 Issued
Array ( [id] => 16000333 [patent_doc_number] => 20200176037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => MEMORY MACRO AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/783915 [patent_app_country] => US [patent_app_date] => 2020-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783915 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/783915
Memory macro and method of operating the same Feb 5, 2020 Issued
Array ( [id] => 16865614 [patent_doc_number] => 11024365 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-01 [patent_title] => Time interleaved sampling of sense amplifier circuits, memory devices and methods of operating memory devices [patent_app_type] => utility [patent_app_number] => 16/782365 [patent_app_country] => US [patent_app_date] => 2020-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 18839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16782365 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/782365
Time interleaved sampling of sense amplifier circuits, memory devices and methods of operating memory devices Feb 4, 2020 Issued
Array ( [id] => 16846089 [patent_doc_number] => 11018186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Multi-level memristor elements [patent_app_type] => utility [patent_app_number] => 16/781157 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 13490 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16781157 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/781157
Multi-level memristor elements Feb 3, 2020 Issued
Array ( [id] => 15969035 [patent_doc_number] => 20200168269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICES, MEMORY SYSTEMS AND METHODS OF OPERATING SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/779194 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10591 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16779194 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/779194
Semiconductor memory devices, memory systems and methods of operating semiconductor memory devices Jan 30, 2020 Issued
Array ( [id] => 16803092 [patent_doc_number] => 10998043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Nonvolatile memory apparatus and memory system using the same [patent_app_type] => utility [patent_app_number] => 16/774773 [patent_app_country] => US [patent_app_date] => 2020-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 11091 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774773 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/774773
Nonvolatile memory apparatus and memory system using the same Jan 27, 2020 Issued
Array ( [id] => 15938521 [patent_doc_number] => 20200160894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => OPTIMIZED SCAN INTERVAL [patent_app_type] => utility [patent_app_number] => 16/749481 [patent_app_country] => US [patent_app_date] => 2020-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16749481 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/749481
Optimized scan interval Jan 21, 2020 Issued
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