Search

Son T. Dinh

Examiner (ID: 14834, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2511, 2818, 2824, 2502
Total Applications
3091
Issued Applications
2938
Pending Applications
75
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19435737 [patent_doc_number] => 20240304235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => VOLTAGE CALIBRATION METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 18/301275 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10028 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301275 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/301275
Voltage calibration method, memory storage device and memory control circuit unit Apr 16, 2023 Issued
Array ( [id] => 19943439 [patent_doc_number] => 12315575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Boost voltage modulated corrective read [patent_app_type] => utility [patent_app_number] => 18/132489 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/132489
Boost voltage modulated corrective read Apr 9, 2023 Issued
Array ( [id] => 18570241 [patent_doc_number] => 20230260578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/296430 [patent_app_country] => US [patent_app_date] => 2023-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18296430 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/296430
Non-volatile semiconductor storage device Apr 5, 2023 Issued
Array ( [id] => 19943438 [patent_doc_number] => 12315574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Auto-calibrated corrective read [patent_app_type] => utility [patent_app_number] => 18/130589 [patent_app_country] => US [patent_app_date] => 2023-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10825 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18130589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/130589
Auto-calibrated corrective read Apr 3, 2023 Issued
Array ( [id] => 18679519 [patent_doc_number] => 20230317175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SEMICONDUCTOR DEVICE, FIRMWARE WRITING METHOD, AND FIRMWARE WRITING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/128380 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18128380 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/128380
SEMICONDUCTOR DEVICE, FIRMWARE WRITING METHOD, AND FIRMWARE WRITING SYSTEM Mar 29, 2023 Abandoned
Array ( [id] => 18812226 [patent_doc_number] => 20230386563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => MEMORY DEVICE, ELECTRONIC DEVICE INCLUDING THE SAME, AND OPERATING METHOD OF ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/127980 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18127980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/127980
Memory device, electronic device including the same, and operating method of electronic device Mar 28, 2023 Issued
Array ( [id] => 19926060 [patent_doc_number] => 12300352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/189580 [patent_app_country] => US [patent_app_date] => 2023-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18189580 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/189580
Semiconductor device Mar 23, 2023 Issued
Array ( [id] => 18514387 [patent_doc_number] => 20230230642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => IDENTIFY THE PROGRAMMING MODE OF MEMORY CELLS DURING READING OF THE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/189824 [patent_app_country] => US [patent_app_date] => 2023-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20830 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18189824 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/189824
Identify the programming mode of memory cells during reading of the memory cells Mar 23, 2023 Issued
Array ( [id] => 18679520 [patent_doc_number] => 20230317176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/188678 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188678 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188678
Semiconductor device Mar 22, 2023 Issued
Array ( [id] => 18696092 [patent_doc_number] => 20230326523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => METHOD OF OPERATING SELECTOR DEVICE, METHOD OF OPERATING NONVOLATILE MEMORY APPARATUS USING THE SAME, ELECTRONIC CIRCUIT DEVICE INCLUDING SELECTOR DEVICE, AND NONVOLATILE MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/188332 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188332 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188332
Method of operating selector device, method of operating nonvolatile memory apparatus using the same, electronic circuit device including selector device, and nonvolatile memory apparatus Mar 21, 2023 Issued
Array ( [id] => 18696098 [patent_doc_number] => 20230326529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => MULTI-TIME PROGRAMMABLE NON-VOLATILE MEMORY CELL AND MEMORY WITH LOW POWER-COST [patent_app_type] => utility [patent_app_number] => 18/186408 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186408 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186408
Multi-time programmable non-volatile memory cell and memory with low power-cost Mar 19, 2023 Issued
Array ( [id] => 19796079 [patent_doc_number] => 12237044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Impedance calibration circuit, memory controller including the impedance calibration circuit and memory system including the memory controller [patent_app_type] => utility [patent_app_number] => 18/186708 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6035 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186708 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186708
Impedance calibration circuit, memory controller including the impedance calibration circuit and memory system including the memory controller Mar 19, 2023 Issued
Array ( [id] => 18865567 [patent_doc_number] => 20230420004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => BRIDGE CHIP, SEMICONDUCTOR STORAGE DEVICE, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/177955 [patent_app_country] => US [patent_app_date] => 2023-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177955 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/177955
Bridge chip, semiconductor storage device, and memory system Mar 2, 2023 Issued
Array ( [id] => 18833579 [patent_doc_number] => 20230402106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => MEMORY SYSTEM AND METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 18/177877 [patent_app_country] => US [patent_app_date] => 2023-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177877 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/177877
Memory system and method for controlling semiconductor memory Mar 2, 2023 Issued
Array ( [id] => 19812177 [patent_doc_number] => 12243585 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-03-04 [patent_title] => Memory write assist [patent_app_type] => utility [patent_app_number] => 18/168847 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9616 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168847 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/168847
Memory write assist Feb 13, 2023 Issued
Array ( [id] => 19277094 [patent_doc_number] => 12027225 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Memory modules including a mirroring circuit and methods of operating the same [patent_app_type] => utility [patent_app_number] => 18/109338 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 12498 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109338 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/109338
Memory modules including a mirroring circuit and methods of operating the same Feb 13, 2023 Issued
Array ( [id] => 19858063 [patent_doc_number] => 12260913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Hyperdimensional computing device [patent_app_type] => utility [patent_app_number] => 18/166484 [patent_app_country] => US [patent_app_date] => 2023-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 4194 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18166484 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/166484
Hyperdimensional computing device Feb 8, 2023 Issued
Array ( [id] => 19348916 [patent_doc_number] => 20240257880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => MEMORY CELL ARRAY WITH ROW DIRECTION GAP BETWEEN ERASE GATE LINES AND DUMMY FLOATING GATES [patent_app_type] => utility [patent_app_number] => 18/104228 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18104228 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/104228
Memory cell array with row direction gap between erase gate lines and dummy floating gates Jan 30, 2023 Issued
Array ( [id] => 18540594 [patent_doc_number] => 20230245704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => TEMPERATURE-BASED MEMORY MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/095787 [patent_app_country] => US [patent_app_date] => 2023-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18095787 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/095787
Temperature-based memory management Jan 10, 2023 Issued
Array ( [id] => 19305260 [patent_doc_number] => 20240233840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MEMORY CONTROLLER AND METHOD FOR ADAPTIVELY PROGRAMMING FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 18/151062 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151062 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151062
Memory controller and method for adaptively programming flash memory Jan 5, 2023 Issued
Menu