Search

Son T. Dinh

Examiner (ID: 17141, Phone: (571)272-1868 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2824, 2511, 2502
Total Applications
3088
Issued Applications
2939
Pending Applications
71
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18865618 [patent_doc_number] => 20230420055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => NON-VOLATILE MEMORY WITH SHORT PREVENTION [patent_app_type] => utility [patent_app_number] => 17/847553 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847553 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847553
Non-volatile memory with short prevention Jun 22, 2022 Issued
Array ( [id] => 19137866 [patent_doc_number] => 11972837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Data sampling circuit and data transmitter circuit [patent_app_type] => utility [patent_app_number] => 17/847918 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847918 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847918
Data sampling circuit and data transmitter circuit Jun 22, 2022 Issued
Array ( [id] => 18848516 [patent_doc_number] => 20230410920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => READ PASS VOLTAGE DEPENDENT RECOVERY VOLTAGE SETTING BETWEEN PROGRAM AND PROGRAM VERIFY [patent_app_type] => utility [patent_app_number] => 17/845430 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845430 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845430
Read pass voltage dependent recovery voltage setting between program and program verify Jun 20, 2022 Issued
Array ( [id] => 18804132 [patent_doc_number] => 11837295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/807034 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 30 [patent_no_of_words] => 19130 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807034
Semiconductor memory device Jun 14, 2022 Issued
Array ( [id] => 19168260 [patent_doc_number] => 11984171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Selective and dynamic deployment of error correction code techniques in integrated circuit memory devices [patent_app_type] => utility [patent_app_number] => 17/841096 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 23441 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841096 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841096
Selective and dynamic deployment of error correction code techniques in integrated circuit memory devices Jun 14, 2022 Issued
Array ( [id] => 18439683 [patent_doc_number] => 20230186978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => MEMORY [patent_app_type] => utility [patent_app_number] => 17/838143 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838143 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/838143
Memory Jun 9, 2022 Issued
Array ( [id] => 18321406 [patent_doc_number] => 20230119534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => METHOD OF SEARCHING READ VOLTAGE OF NONVOLATILE MEMORY DEVICE USING REGRESSION ANALYSIS AND METHOD OF READING DATA FROM NONVOLATILE MEMORY DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/804851 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804851 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/804851
Method of searching read voltage of nonvolatile memory device using regression analysis and method of reading data from nonvolatile memory device using the same May 30, 2022 Issued
Array ( [id] => 18812239 [patent_doc_number] => 20230386576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => NON-VOLATILE MEMORY WITH INTER-DIE CONNECTION [patent_app_type] => utility [patent_app_number] => 17/825337 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825337 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825337
Non-volatile memory with inter-die connection May 25, 2022 Issued
Array ( [id] => 19093702 [patent_doc_number] => 11955166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Apparatuses and methods for signal transmission preconditioning [patent_app_type] => utility [patent_app_number] => 17/749563 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9489 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749563 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749563
Apparatuses and methods for signal transmission preconditioning May 19, 2022 Issued
Array ( [id] => 19093718 [patent_doc_number] => 11955182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Adaptive pre-programming [patent_app_type] => utility [patent_app_number] => 17/746616 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 13157 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746616 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746616
Adaptive pre-programming May 16, 2022 Issued
Array ( [id] => 18593125 [patent_doc_number] => 11742034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Memory device including dynamic programming voltage [patent_app_type] => utility [patent_app_number] => 17/745415 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 17480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745415 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/745415
Memory device including dynamic programming voltage May 15, 2022 Issued
Array ( [id] => 18008704 [patent_doc_number] => 20220367471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => SEMICONDUCTOR-ELEMENT-INCLUDING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/743115 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 409 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17743115 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/743115
Semiconductor-element-including memory device May 11, 2022 Issued
Array ( [id] => 18774027 [patent_doc_number] => 20230368857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => Linked XOR Flash Data Protection Scheme [patent_app_type] => utility [patent_app_number] => 17/743287 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17743287 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/743287
Linked XOR flash data protection scheme May 11, 2022 Issued
Array ( [id] => 18774026 [patent_doc_number] => 20230368856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => TECHNIQUES FOR INITIALIZING MEMORY ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 17/740823 [patent_app_country] => US [patent_app_date] => 2022-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17740823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/740823
Techniques for initializing memory error correction May 9, 2022 Issued
Array ( [id] => 19062900 [patent_doc_number] => 11942145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Static random access memory layout [patent_app_type] => utility [patent_app_number] => 17/662364 [patent_app_country] => US [patent_app_date] => 2022-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17662364 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/662364
Static random access memory layout May 5, 2022 Issued
Array ( [id] => 17811022 [patent_doc_number] => 20220262857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => METHOD AND RELATED APPARATUS FOR IMPROVING MEMORY CELL PERFORMANCE IN SEMICONDUCTOR-ON-INSULATOR TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 17/734315 [patent_app_country] => US [patent_app_date] => 2022-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10047 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/734315
Method and related apparatus for improving memory cell performance in semiconductor-on-insulator technology May 1, 2022 Issued
Array ( [id] => 18741600 [patent_doc_number] => 20230350581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA SECURITY AND ACCESS [patent_app_type] => utility [patent_app_number] => 17/730992 [patent_app_country] => US [patent_app_date] => 2022-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17730992 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/730992
Apparatuses, systems, and methods for managing metadata security and access Apr 26, 2022 Issued
Array ( [id] => 18698631 [patent_doc_number] => 20230329122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => MRAM MEMORY ARRAY YIELD IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 17/658838 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17658838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/658838
MRAM memory array yield improvement Apr 11, 2022 Issued
Array ( [id] => 17737750 [patent_doc_number] => 20220223212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => MULTI-STATE PROGRAMMING OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/709102 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709102 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/709102
Multi-state programming of memory cells Mar 29, 2022 Issued
Array ( [id] => 19046471 [patent_doc_number] => 11935590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Device for matrix-vector multiplications [patent_app_type] => utility [patent_app_number] => 17/706695 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6392 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/706695
Device for matrix-vector multiplications Mar 28, 2022 Issued
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